Zobrazeno 1 - 10
of 18
pro vyhledávání: '"Pedram Payandehnia"'
Autor:
Ramin Zanbaghi, Kartikeya Mayaram, Hossein Zareie, Pedram Payandehnia, Hamidreza Maghami, Siladitya Dey, Hossein Mirzaie, Terri S. Fiez, Justin B. Goins
Publikováno v:
IEEE Journal of Solid-State Circuits. 55:706-718
In this article, an efficient technique is introduced to extract the quantization noise of a multi-phase voltage-controlled oscillator (VCO)-based quantizer (VCOQ) in the time domain as a pulsewidth modulated (PWM) signal. Using this technique, a new
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::03f14c9d96533a75c482f1963876c886
https://doi.org/10.1109/jssc.2019.2954764
https://doi.org/10.1109/jssc.2019.2954764
Autor:
Ramin Zanbaghi, Pedram Payandehnia, Hossein Mirzaie, Hamidreza Maghami, Terri S. Fiez, Kartikeya Mayaram
Publikováno v:
IEEE Transactions on Circuits and Systems II: Express Briefs. 66:347-351
This brief presents the design and implementation of a new blocker tolerant wideband continuous-time delta-sigma modulator. Using a customized digital integrator with inherent data-weighted averaging at the back-end of the modulator, the power consum
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::07899d497420a6a6f34aa012cc1484e8
https://doi.org/10.1109/tcsii.2018.2852599
https://doi.org/10.1109/tcsii.2018.2852599
Publikováno v:
CICC
In many data converter structures, an embedded digital-to-analog converter (DAC) is a key block, and its mismatch and dynamic errors limit the overall accuracy of the operation. Examples include multi-bit ΔΣ and incremental analog-to-digital conver
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::fdde75d7338c14eeb0a5eee884a397ec
https://doi.org/10.1109/cicc48029.2020.9075916
https://doi.org/10.1109/cicc48029.2020.9075916
Autor:
Manjunath Kareppagoudr, Massoud Tohidian, Siladitya Dey, Gabor C. Temes, Hossein Mirzaie, Hamidreza Maghami, Pedram Payandehnia
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. 65:2353-2364
A novel switched-capacitor low-pass filter architecture is presented. In the proposed scheme, a feedback path is added to a charge-rotating real-pole filter to implement complex poles. The selectivity is enhanced, and the in-band loss is reduced comp
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7c95e94bf7efc954aeb5ae5acc57b1d1
https://doi.org/10.1109/tcsi.2017.2788466
https://doi.org/10.1109/tcsi.2017.2788466
Publikováno v:
Electronics Letters. 54:1366-1368
A novel 0-2 Multi-Stage Noise Shaping (MASH) analogue-to-digital converter (ADC) is proposed. The first stage is implemented using a 4-bit SAR ADC. The second stage uses a voltage controlled oscillator (VCO)-based quantiser (VCOQ). Unlike earlier VCO
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9b96dbc4a5429f1254aaa41866ec6e8f
https://doi.org/10.1049/el.2018.6779
https://doi.org/10.1049/el.2018.6779
Publikováno v:
ISCAS
A 0–2 Multi Stage Noise Shaping (MASH) analog-to-digital converter (ADC) is proposed. A SAR ADC and a VCO-based quantizer (VCOQ) are used in the first stage and second stages, respectively. The VCOQ proposed in this paper achieves second-order nois
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f3dcfe53d9e526df7f16ec331bda06f9
https://doi.org/10.1109/iscas.2019.8702397
https://doi.org/10.1109/iscas.2019.8702397
Publikováno v:
Electronics Letters. 53:528-530
In this Letter, an opamp-free noise shaping successive-approximation register (SAR) ADC is proposed. Third-order noise shaping is achieved by implementing a second-order passive filter and a passive error feedback topology. In the proposed scheme, th
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::031df73bdb6852c2e9f6e65514e987c1
https://doi.org/10.1049/el.2017.0318
https://doi.org/10.1049/el.2017.0318
Autor:
Hossein Mirzaie, Hamidreza Maghami, Kartikeya Mayaram, Ramin Zanbaghi, Pedram Payandehnia, Terri S. Fiez
Publikováno v:
MWSCAS
A highly linear SAR-VCO MASH delta-sigma ADC architecture is presented. OTA based analog integrators are not needed whereby the ADC is mostly digital and process scaling friendly. A new technique is introduced to extract the quantization noise of the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::bab148328aac422e5fff09c30a445114
https://doi.org/10.1109/mwscas.2018.8623894
https://doi.org/10.1109/mwscas.2018.8623894
Publikováno v:
Electronics Letters. 52:1592-1594
A novel complex-pole switched-capacitor lowpass filter topology is presented. The proposed scheme features sharper roll-off in the frequency response and reduced in-band loss compared with a real-pole filter. It provides higher stop-band rejection fo
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2b385be232952583fa1dcd3d5e014471
https://doi.org/10.1049/el.2016.2487
https://doi.org/10.1049/el.2016.2487
Autor:
Pedram Payandehnia, Hamidreza Maghami, Hossein Mirzaie, Ramin Zanbaghi, K. Mayaram, Terri S. Fiez
Publikováno v:
ISCAS
In this paper a new VCO-based MASH delta-sigma ADC structure is presented. The proposed architecture does not require any OTA-based analog integrators or integrating capacitors. Second-order noise shaping is achieved by using a VCO as an integrator i
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::92d4371bd6fd842802cd28b1ed3de528
https://doi.org/10.1109/iscas.2017.8050625
https://doi.org/10.1109/iscas.2017.8050625