Zobrazeno 1 - 10
of 10
pro vyhledávání: '"Pavlenko, Evgeny"'
Autor:
Kalinin, Maxim1 (AUTHOR) max@ibks.spbstu.ru, Pavlenko, Evgeny1 (AUTHOR), Gavva, Georgij1 (AUTHOR), Pakhomov, Maxim1 (AUTHOR)
Publikováno v:
Sensors (14248220). Nov2024, Vol. 24 Issue 22, p7116. 16p.
Autor:
Pavlenko Evgeny, Zegzhda Dmitry
Publikováno v:
SHS Web of Conferences, Vol 44, p 00067 (2018)
The authors have offered the homeostatic control system architecture for digital manufacture security based on the software-defined network technology. We have highlighted the development features of digital manufacture systems and defined the techno
Externí odkaz:
https://doaj.org/article/d803a32c4da741dd85f346eafc8187fb
Autor:
Pavlenko Evgeny, Zegzhda Dmitry
Publikováno v:
SHS Web of Conferences, Vol 44, p 00066 (2018)
This study suggests a new digital manufacturing security paradigm based on the bio-inspired homeostasis concept to provide structural and functional cyber resilience of digital manufacturing to external destructive actions. Digital manufacturing mana
Externí odkaz:
https://doaj.org/article/d7534aad092f44cf9deb7db2809610f6
Akademický článek
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Akademický článek
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Publikováno v:
BlackSeaCom
Paper proposed an approach to estimating the sustainability of cyber-physical systems based on system state analysis. Authors suggested that sustainability is the system ability to reconfigure for recovering from attacking influences. Proposed a new
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::aec971caf155a7cf8e49d9aa306c4c95
https://doi.org/10.1109/blackseacom.2019.8812826
https://doi.org/10.1109/blackseacom.2019.8812826
Publikováno v:
SHS Web of Conferences; 2018, Vol. 44, pN.PAG-N.PAG, 9p
Publikováno v:
SHS Web of Conferences; 2018, Vol. 44, pN.PAG-N.PAG, 11p
Autor:
Pavlenko, Evgeny
The increasing complexity of modern SoC designs makes tasks of SoC formal verification a lot more complex and challenging. This motivates the research community to develop more robust approaches that enable efficient formal verification for such desi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=od_______651::85c19ced574ada4b21d66f528f7a107c
https://kluedo.ub.uni-kl.de/files/2873/diss-final.pdf
https://kluedo.ub.uni-kl.de/files/2873/diss-final.pdf
Autor:
Wedler, Markus, Pavlenko, Evgeny, Dreyer, Alexander, Seelisch, Frank, Stoffel, Dominik, Greuel, Gert-Martin, Kunz, Wolfgang
This paper describes our new satisfyability (SAT) modulo theory (SMT) solver STABLE for the quantifier-free logic over fixed size bit vectors. Our main application domain is formal verification of system-on-chip (SoC) modules designed for complex com
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::32d6d2140c875e68bd949b45666d1897