Zobrazeno 1 - 10
of 13
pro vyhledávání: '"Pavel Benacek"'
Publikováno v:
ANCS
DDoS attacks are a significant threat to internet service or infrastructure providers. This poster presents an FPGA-accelerated device and DDoS mitigation technique to overcome such attacks. Our work addresses amplification attacks whose goal is to g
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::91974de8d59a6e3160b7a918c84e7b2f
https://doi.org/10.1109/ancs.2019.8901882
https://doi.org/10.1109/ancs.2019.8901882
Publikováno v:
FCCM
The P4 language is a language suitable for the description of packet processing inside a network device. The typical P4 device consists of three main building blocks: Parser, Match+Action Tables and Deparser. The deparsing is the most challenging blo
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1b83dfa8208716df4ef0fc6cd8a8002f
https://doi.org/10.1109/fccm.2019.00064
https://doi.org/10.1109/fccm.2019.00064
Publikováno v:
ICNP
The P4 is a general and platform agnostic language for the description of packet processing functionality. So far it is being supported by a number of technology companies which provided a way for programming of their devices using the P4 language. O
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f0ab9e6488cc6bf12cc4dd3f225f4b2c
https://doi.org/10.1109/icnp.2018.00065
https://doi.org/10.1109/icnp.2018.00065
Publikováno v:
FPGA
As throughput of computer networks is on a constant rise, there is a need for ever-faster packet parsing modules at all points of the networking infrastructure. Parsing is a crucial operation which has an influence on the final throughput of a networ
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::561a7dfe17d8e3c2a7e00f8ea067c7f9
https://doi.org/10.1145/3174243.3174250
https://doi.org/10.1145/3174243.3174250
Publikováno v:
FPL
The P4 language provides a way to describe a custom network packet processing behavior that involves header parsing, matching and assembling modified packets. Such abstraction represents a significant step towards removing the limitation of fixed-fun
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2b9fc8f8855a8170bb9417737a5a2397
https://doi.org/10.23919/fpl.2017.8056835
https://doi.org/10.23919/fpl.2017.8056835
Publikováno v:
ANCS
This paper deals with hardware acceleration of statistical methods for detection of anomalies on 100 Gb/s Ethernet. The approach is demonstrated by implementing a sequential Non-Parametric Cumulative Sum (NP-CUSUM) procedure. We use high-level synthe
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6a0d0f312102ebd38859855dd440741a
https://doi.org/10.1145/2658260.2661773
https://doi.org/10.1145/2658260.2661773
Publikováno v:
FPL
Current hardware acceleration cores for network traffic processing are often well optimized for one particular task and therefore provide high level of hardware acceleration. But for many applications, such as network traffic monitoring and security,
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5b9355ade7feffc2a0d4e00759a9307b
https://doi.org/10.1109/fpl.2014.6927443
https://doi.org/10.1109/fpl.2014.6927443
Publikováno v:
DSD
This paper deals with the architecture for effective merging of high-speed network streams into one communication line. Networking hardware typically has more than one Ethernet port and if we want to transfer data via single communication bus (PCI-Ex
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0b6959de1d33503a9417db0708809d1a
https://doi.org/10.1109/dsd.2014.25
https://doi.org/10.1109/dsd.2014.25
Autor:
Pavel Benacek, Viktor Pus
Publikováno v:
FPGA
The paper deals with the design of application-specific processor which uses high level synthesized instruction engines. This approach is demonstrated on the instance of high speed network flow measurement processor for FPGA. Our newly proposed conce
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a8fe3a65a224dd3a62963809e5dfab7c
https://doi.org/10.1145/2554688.2554754
https://doi.org/10.1145/2554688.2554754
Publikováno v:
2016 IEEE 24th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)
FCCM
FCCM
Software Defined Networking and OpenFlow offer an elegant way to decouple network control plane from data plane. This decoupling has led to great innovation in the control plane, yet the data plane changes come at much slower pace, mainly due to the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::cc2c14ace7efed53eb4b455d35d574a0
