Zobrazeno 1 - 10
of 11
pro vyhledávání: '"Paulo Da Cunha Possa"'
Autor:
Valentin Obac Roda, Glauberto Leilson Alves de Albuquerque, Sakuyama, A. Avelino, Paulo Da Cunha Possa
Publikováno v:
PRZEGLĄD ELEKTROTECHNICZNY. 1:260-264
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::747fec9181480e8cd877a7b00feb1259
https://doi.org/10.15199/48.2017.01.63
https://doi.org/10.15199/48.2017.01.63
Autor:
Paulo Da Cunha Possa, Naim Harb, Carlos Valderrama, Glauberto Leilson Alves de Albuquerque, Álvaro Avelino, Valentin Obac
Publikováno v:
Lecture Notes in Computer Science ISBN: 9783319562575
Power consumption reduction is crucial for portable equipments and for those in remote locations, whose battery replacement is impracticable. P\(^2\)IP is an architecture targeting real-time embedded image and video processing, which combines runtime
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2c3385de975a93d42fbab6fab017715a
https://doi.org/10.1007/978-3-319-56258-2_2
https://doi.org/10.1007/978-3-319-56258-2_2
Publikováno v:
PDeS
This work presents a design framework for real-time image and video processing enabling exploration and evaluation of different processing techniques. The goal of our educational approach is to develop a flexible and easily customizable environment f
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c491f0019f6c26099c66d8bd1acabc1c
https://doi.org/10.3182/20101006-2-pl-4019.00012
https://doi.org/10.3182/20101006-2-pl-4019.00012
Autor:
Fernanda Isabel Marques Argoud, José Marino Neto, Fernando Mendes de Azevedo, Juliano Elesbão Rathke, Eduardo Andrighetto, Renato Garcia Ojeda, Paulo Da Cunha Possa, Felipe Chaves Santos, Robson Adur
Publikováno v:
Revista Brasileira de Engenharia Biomédica. 24:99-108
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::50d0727c9a7f3db560c0ad3432bb6e00
https://doi.org/10.4322/rbeb.2012.052
https://doi.org/10.4322/rbeb.2012.052
Publikováno v:
Microprocessors and Microsystems: Embedded Hardware Design
Microprocessors and Microsystems: Embedded Hardware Design, Elsevier, 2015, In press. ⟨10.1016/j.micpro.2015.06.010⟩
Microprocessors and Microsystems: Embedded Hardware Design (MICPRO)
Microprocessors and Microsystems: Embedded Hardware Design (MICPRO), Elsevier, 2015, In press. ⟨10.1016/j.micpro.2015.06.010⟩
Microprocessors and Microsystems: Embedded Hardware Design, Elsevier, 2015, In press. ⟨10.1016/j.micpro.2015.06.010⟩
Microprocessors and Microsystems: Embedded Hardware Design (MICPRO)
Microprocessors and Microsystems: Embedded Hardware Design (MICPRO), Elsevier, 2015, In press. ⟨10.1016/j.micpro.2015.06.010⟩
International audience; This paper presents a novel systolic Coarse-Grained Reconfigurable Architecture for real-time image and video processing called P 2 IP. The P 2 IP is a scalable architecture that combines the low-latency characteristic of syst
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::edb85b3aeeacc44c2d55260928378513
https://hal.archives-ouvertes.fr/hal-01171651/document
https://hal.archives-ouvertes.fr/hal-01171651/document
Autor:
Georgios Fourtounis, Paulo Da Cunha Possa, Laurent Jolczyk, Ricardo Chessini Bose, Carlos Valderrama, Naim Harb
Multiple processors, microcontrollers, or DSPs have been used in embedded systems to distribute control and data flow according to the application at hand. The recent trends of incorporating multiple cores in the same chip significantly expands the p
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5ea0a26c5acdfb0ff6be4ffd0754c651
https://doi.org/10.4018/978-1-4666-3922-5.ch019
https://doi.org/10.4018/978-1-4666-3922-5.ch019
Publikováno v:
FPL
In this paper, we present a FPGA based flexible self-adapting architecture for two features detectors, the Canny edge detector and the Harris corner detector, with reduced latency and memory requirements, and supporting variable resolution images. Th
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7a9fd23f172d26512d71c5abb07d8a12
https://doi.org/10.1109/fpl.2012.6339230
https://doi.org/10.1109/fpl.2012.6339230
Publikováno v:
ICECS
One of the main challenges for embedded system designers is to find a tradeoff between performance and power consumption. In order to reach this goal, hardware accelerators have been used to offload specific tasks from the CPU, improving the global p
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::382d6d174ee610222965a75e5bbe7e13
https://doi.org/10.1109/icecs.2011.6122291
https://doi.org/10.1109/icecs.2011.6122291
Publikováno v:
ICECS
This paper presents the design of a Low latency spectrum analyzer targeted for Systems on Chip applications to perform real time multiband control. The discrete Fourier transforms are computed with the Goertzel Algorithm which performs better than th
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::33a554a5f2589195a565a42486237032
https://doi.org/10.1109/icecs.2010.5724671
https://doi.org/10.1109/icecs.2010.5724671
Publikováno v:
ICECS
The main objective of this educational paper is to provide an updated survey of ASIC and FPGA technologies' convergence in reconfigurable and embedded systems. Through the analysis of design methodologies and strategies facing multi-core and power co
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::38bf83ca11677424c5291fe322ffc6ea
https://doi.org/10.1109/icecs.2010.5724719
https://doi.org/10.1109/icecs.2010.5724719