Zobrazeno 1 - 10
of 10
pro vyhledávání: '"Paul N. Loewenstein"'
Autor:
Sebastian Turullols, Ha Pham, Yifan YangGong, Yuanjung David Lin, Hoyeol Cho, Heechoul Park, Dawei Huang, Sudesna Dash, Curtis McAllister, Hongping Penny Li, Changku Hwang, Ali Vahidsafa, Chaoyang Zheng, Vijay Srinivasan, Jeffrey S. Brooks, Francis Schumacher, Wenjay Hsu, Venkat Krishnaswamy, Georgios Konstadinidis, Alan P. Smith, Paul N. Loewenstein, Robert P. Masleid, Robert T. Golla
Publikováno v:
IEEE Journal of Solid-State Circuits. 51:79-91
The SPARC M7 processor offers up to 3 $\times$ the throughput performance of Oracle's previous SPARC processor generation for many enterprise workloads. It contains 32 highly optimized S4 cores that include a more efficient L2 cache scheme, support f
Autor:
Paul N. Loewenstein, Stephen E. Phillips, Sivaramakrishnan Ram, Curtis McAllister, Serena Leung, David Smentek, Sumti Jairath, Kathirgamar Aingaran, Thomas M. Wicki, Zoran Radovic, Georgios Konstadinidis
Publikováno v:
IEEE Micro. 35:36-45
The Oracle Sparc M7 processor more than triples the throughput of the Sparc M6 processor, while increasing per-thread performance, power efficiency, and I/O bandwidth. M7 contains 32 8-thread, dual-issue, out-of-order Sparc cores. To minimize L3 cach
Autor:
Sebastian Turullols, Ali Vahidsafa, Sivaramakrishnan Ram, Sumti Jairath, Paul N. Loewenstein, John R. Feehrer, David Smentek
Publikováno v:
IEEE Micro. 33:48-57
The Oracle Sparc T5 processor more than doubles the throughput of the Sparc T4 processor, while increasing per-thread performance, scalability, power efficiency, and I/O bandwidth. The authors detail the improvements and new features leading to this
Autor:
Changku Hwang, Paul N. Loewenstein, Penny Li, Hoyeol Cho, Heechoul Park, Sudesna Dash, Francis Schumacher, Jinuk Luke Shin, Yuanjung David Lin, Wenjay Hsu, Venkat Krishnaswamy, Georgios Konstadinidis, Robert P. Masleid, Chaoyang Zheng, Curtis McAllister, Vijay Srinivasan, Dawei Huang
Publikováno v:
ISSCC
The SPARC M7 processor delivers more than 3x throughput performance improvement over its predecessor SPARC M6 for commercial applications. It introduces new design features, such as the S4 core, a 64MB L3 cache subsystem with application data integri
Autor:
Paul N. Loewenstein
Publikováno v:
Formal Methods in System Design. 3:117-149
Automata are suitable for modeling a wide range of sequential and concurrent hardware. They can be used at many levels of abstraction, from top-level specifications to register transfer descriptions suitable for input to synthesis tools. This paper c
Autor:
Paul N. Loewenstein, David L. Dill
Publikováno v:
CAV (DIMACS/AMS volume)
We present a formal verification method for concurrent systems. The technique is to show a correspondence between state machines representing an implementation and specification behaviour. The correspondence is called a simulation relation, and is pa
Autor:
Paul N. Loewenstein
Publikováno v:
Higher Order Logic Theorem Proving and Its Applications ISBN: 9783540602750
TPHOLs
TPHOLs
Some properties of the Sproull counterflow pipeline architecture are formally verified using automata theory and higher order logic in the HOL theorem prover. The proof steps are presented. Despite the pipeline being a non-deterministic asynchronous
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ed2139950620a00ee3e1f58a06a19100
https://doi.org/10.1007/3-540-60275-5_70
https://doi.org/10.1007/3-540-60275-5_70
Publikováno v:
DAC
Increasing complexity of microprocessor-based systems puts pressure on a product's time-to-market. We describe a methodology used in designing the system interface of UltraSPARC-I. This methodology allowed us to define the system interface architectu
Conference
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Conference
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