Zobrazeno 1 - 10
of 70
pro vyhledávání: '"Paul Le Guernic"'
Publikováno v:
Science of Computer Programming. 228:102958
Publikováno v:
SSRN Electronic Journal.
Autor:
Clément Guy, Thierry Gautier, Jean-Pierre Talpin, Paul Le Guernic, Alexandre Honorat, Loïc Besnard
Publikováno v:
Frontiers of Computer Science
Frontiers of Computer Science, Springer Verlag, 2019, 13 (4), pp.677-697. ⟨10.1007/s11704-017-6134-5⟩
Frontiers of Computer Science, 2019, 13 (4), pp.677-697. ⟨10.1007/s11704-017-6134-5⟩
Frontiers of Computer Science, Springer Verlag, 2019, 13 (4), pp.677-697. ⟨10.1007/s11704-017-6134-5⟩
Frontiers of Computer Science, 2019, 13 (4), pp.677-697. ⟨10.1007/s11704-017-6134-5⟩
This paper investigates how state diagrams can be best represented in the polychronous model of computation (MoC) and proposes to use this model for code validation of behavior specifications in Architecture Analysis & Design Language (AADL). In this
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::4799614bc986afc07f600c4716569d29
https://hal.inria.fr/hal-01411257/document
https://hal.inria.fr/hal-01411257/document
Autor:
Paul Le Guernic, Loïc Besnard, Clement Guy, Jean-Pierre Talpin, Thierry Gautier, Etienne Borde, Brian R. Larson
Publikováno v:
Cyber-Physical System Design from an Architecture Analysis Viewpoint
Cyber-Physical System Design from an Architecture Analysis Viewpoint, Springer, 2017, Cyber-Physical System Design from an Architecture Analysis Viewpoint, ⟨10.1007/978-981-10-4436-6_3⟩
[Research Report] RR-8950, INRIA. 2016, pp.30-39
Cyber-Physical System Design from an Architecture Analysis Viewpoint ISBN: 9789811044359
High Level Design Validation and Test Workshop (HLDVT), 2016 IEEE International
HLDVT 2016-18th IEEE International High-Level Design Validation and Test Workshop
HLDVT 2016-18th IEEE International High-Level Design Validation and Test Workshop, Oct 2016, Santa Cruz, United States. pp.30-39, ⟨10.1109/HLDVT.2016.7748252⟩
HLDVT 2016-18th IEEE International High-Level Design Validation and Test Workshop, Oct 2016, Santa Cruz, United States. IEEE, High Level Design Validation and Test Workshop (HLDVT), 2016 IEEE International, pp.30-39, 2016, High-level design, verification and test. 〈http://www.hldvt.org/〉. 〈10.1109/HLDVT.2016.7748252〉
HLDVT
Cyber-Physical System Design from an Architecture Analysis Viewpoint, Springer, 2017, Cyber-Physical System Design from an Architecture Analysis Viewpoint, ⟨10.1007/978-981-10-4436-6_3⟩
[Research Report] RR-8950, INRIA. 2016, pp.30-39
Cyber-Physical System Design from an Architecture Analysis Viewpoint ISBN: 9789811044359
High Level Design Validation and Test Workshop (HLDVT), 2016 IEEE International
HLDVT 2016-18th IEEE International High-Level Design Validation and Test Workshop
HLDVT 2016-18th IEEE International High-Level Design Validation and Test Workshop, Oct 2016, Santa Cruz, United States. pp.30-39, ⟨10.1109/HLDVT.2016.7748252⟩
HLDVT 2016-18th IEEE International High-Level Design Validation and Test Workshop, Oct 2016, Santa Cruz, United States. IEEE, High Level Design Validation and Test Workshop (HLDVT), 2016 IEEE International, pp.30-39, 2016, High-level design, verification and test. 〈http://www.hldvt.org/〉. 〈10.1109/HLDVT.2016.7748252〉
HLDVT
International audience; In system design, an architecture specification or model serves, among other purposes, as a repository to share knowledge about the system being designed. Such a repository enables automatic generation of analytical models for
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::930e36ac4ba38406508ff6c814019f29
https://inria.hal.science/hal-01615143
https://inria.hal.science/hal-01615143
Autor:
Jean-Pierre Talpin, Huafeng Yu, Paul Le Guernic, Yue Ma, Thierry Gautier, Loïc Besnard, Yves Sorel
Publikováno v:
Frontiers of Computer Science
Frontiers of Computer Science, Springer Verlag, 2013, 7 (5), pp.627-649. ⟨10.1007/s11704-013-2307-z⟩
Frontiers of Computer Science, 2013, 7 (5), pp.627-649. ⟨10.1007/s11704-013-2307-z⟩
Frontiers of Computer Science, Springer Verlag, 2013, 7 (5), pp.627-649. ⟨10.1007/s11704-013-2307-z⟩
Frontiers of Computer Science, 2013, 7 (5), pp.627-649. ⟨10.1007/s11704-013-2307-z⟩
International audience; Architecture analysis & design language (AADL) has been increasingly adopted in the design of embedded systems, and corresponding scheduling and formal verification have been well studied. However, little work takes code distr
Publikováno v:
Journal Européen des Systèmes Automatisés. 45:61-76
AADL est dedie a la conception de haut niveau et l'evaluation de systemes embarques. Il permet de decrire la structure d'un systeme et ses aspects fonctionnels par une approche a base de composants. Des processus localement synchrones sont alloues su
Publikováno v:
Electronic Notes in Theoretical Computer Science. 200(1):51-70
As code generation for synchronous programs requires strong safety properties to be satisfied, compositionality becomes a difficult goal to achieve. Most synchronous languages, such as Esterel, Lustre or Signal require a given module or compilation u
Publikováno v:
TASE 2015, 9th International Symposium on Theoretical Aspects of Software Engineering
TASE 2015, 9th International Symposium on Theoretical Aspects of Software Engineering, Sep 2015, Nanjing, China. pp.95-102, ⟨10.1109/TASE.2015.21⟩
TASE 2015, 9th International Symposium on Theoretical Aspects of Software Engineering, Sep 2015, Nanjing, China. pp.95-102, ⟨10.1109/TASE.2015.21⟩
International audience; This paper investigates the way state diagrams can be best represented in the polychronous model of computation. In this relational model, the basic objects are signals, which are related through data-flow equations. Signals a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::da30700e45dd26863bc64802032a25ff
https://hal.science/hal-01240440
https://hal.science/hal-01240440
Publikováno v:
SCOPES
This presentation demonstrates a scalable, modular, refinable methodology for translation validation applied to a mature (20 years old), large (500k lines of C), open source (Eclipse/Polarsys IWG project POP) code generation suite, all by using off-t
Publikováno v:
Fundamental Approaches to Software Engineering ISBN: 9783662466742
FASE
FASE-ETAPS 2015
FASE-ETAPS 2015, Apr 2015, London, United Kingdom
FASE
FASE-ETAPS 2015
FASE-ETAPS 2015, Apr 2015, London, United Kingdom
International audience; Translation validation was introduced as a technique to for-mally verify the correctness of code generators that attempts to verify that program transformations preserve the semantics. In this work, we adopt this approach to c
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::99071d2b95fa73efe6f33520bbc1d4a4
https://hal.inria.fr/hal-01087795v3
https://hal.inria.fr/hal-01087795v3