Zobrazeno 1 - 10
of 111
pro vyhledávání: '"Paul Ampadu"'
Autor:
Meilin Zhang, Paul Ampadu
Publikováno v:
Journal of Low Power Electronics and Applications, Vol 4, Iss 1, Pp 44-62 (2014)
We propose a novel two-layer error control code, combining error detection capability of rectangular codes and error correction capability of Hamming product codes in an efficient way, in order to increase cache error resilience for many core systems
Externí odkaz:
https://doaj.org/article/bc2768f9f79c4d119020bb86d2ce6702
Autor:
Xingye Liu, Paul Ampadu
Publikováno v:
2022 IEEE 35th International System-on-Chip Conference (SOCC).
Autor:
Shenghou Ma, Paul Ampadu
Publikováno v:
2022 IEEE 35th International System-on-Chip Conference (SOCC).
Autor:
Xingye Liu, Paul Ampadu
Publikováno v:
2022 IEEE 65th International Midwest Symposium on Circuits and Systems (MWSCAS).
Autor:
Xingye Liu, Paul Ampadu
Publikováno v:
2022 IEEE International Symposium on Circuits and Systems (ISCAS).
Autor:
Xingye Liu, Paul Ampadu
Publikováno v:
2021 IEEE 34th International System-on-Chip Conference (SOCC).
An Energy-Efficient NoC Router with Adaptive Fault-Tolerance Using Channel Slicing and On-Demand TMR
Publikováno v:
IEEE Transactions on Emerging Topics in Computing. 6:538-550
The competing goals of energy-efficiency, performance, and fault tolerance have not been well bridged in current NoC designs. In this paper, we propose an energy-efficient NoC router that exhibits strong fault-tolerance by leveraging channel slicing.
Existing power analysis techniques rely on strong adversary models with prior knowledge of the leakage or training data. We introduce side-channel analysis with unsupervised learning (SCAUL) that can recover the secret key without requiring prior kno
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::83edc5c1100c60df1a53ef067dcc90f3
http://arxiv.org/abs/2001.05951
http://arxiv.org/abs/2001.05951
Publikováno v:
ASHES@CCS
Physical cryptographic implementations are vulnerable to side-channel attacks, including fault attacks, which can be used to recover a secret key. Using a deep neural network (NN) with fault intensity map analysis (FIMA), we present a new highly effi
Energy-efficient and high-performance NoC architecture and mapping solution for deep neural networks
Autor:
Farhadur Reza, Paul Ampadu
Publikováno v:
NOCS
With the advancement and miniaturization of transistor technology, hundreds of cores can be integrated on a single chip. Network-on-Chips (NoCs) are the de facto on-chip communication fabrics for multi/many core systems because of their benefits over