Zobrazeno 1 - 10
of 12
pro vyhledávání: '"Patrick M. Williams"'
Autor:
Jeffrey Hemmett, Patrick M. Williams, Michael G. Wood, Debjit Sinha, Suriya T. Skariah, Peddawad Chaitanya Ravindra, Vasant Rao
Publikováno v:
DAC
Traditional statistical static timing analysis (SSTA) using available single-input switching (SIS) based gate delay libraries either ignore timing impact from multiple-input switching (MIS) or use single-corner (deterministic) models for MIS consider
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c43e4373550e46f9c7e204be1a9236e4
https://doi.org/10.1109/dac18072.2020.9218601
https://doi.org/10.1109/dac18072.2020.9218601
Autor:
Patrick M. Williamson, Kaveh Momenzadeh, Philip Hanna, Mohammadreza Abbasian, Nadim Kheir, Aron Lechtig, Stephen Okajima, Mason Garcia, Arun J. Ramappa, Ara Nazarian, Joseph P. DeAngelis
Publikováno v:
BMC Musculoskeletal Disorders, Vol 24, Iss 1, Pp 1-10 (2023)
Abstract Background The current understanding of glenohumeral joint stability is defined by active restrictions and passive stabilizers including naturally-occurring negative intraarticular pressure. Cadaveric specimens have been used to evaluate the
Externí odkaz:
https://doaj.org/article/e7a348d1b42a47be9d538abf7ed58eef
Autor:
David W. Lewis, Joachim Keinert, R. D. Morel, Jack DiLullo, A. E. Barish, Peter J. Camporese, P. E. Dudley, D. Thomas, Howard H. Smith, J. R. Ripley, R. Berridge, R. Averill, Thomas Edward Rosser, Phillip J. Restle, Michael Alexander Bowen, Nicole Schwartz, Patrick M. Williams, P. Shephard, Steve Runyon
Publikováno v:
IBM Journal of Research and Development. 51:685-714
The IBM POWER6™ microprocessor is a 790 million-transistor chip that runs at a clock frequency of greater than 4 GHz. The complexity and size of the POWER6 microprocessor, together with its high operating frequency, present a number of significant
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4f5bf2c0dccdc2f4f0523c80566f9d43
https://doi.org/10.1147/rd.516.0685
https://doi.org/10.1147/rd.516.0685
Autor:
Richard F. Rizzolo, Guenter Mayer, S. Carey, G. Doettling, A. P. Wagstaff, Vern A. Victoria, Christopher M. Carney, Patrick M. Williams, W. Nop, D. E. Skooglund, Joachim Keinert, P. Loeffler, Christopher J. Berry
Publikováno v:
IBM Journal of Research and Development. 51:19-35
Cycle-time targets were set for the IBM System z9TM processor subsystem prior to building the system, and achieving these targets was one of the biggest challenges we faced during hardware development. In particular, although the processor-subsystem
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e71f2c865ce43f93a3e099751a6729b8
https://doi.org/10.1147/rd.511.0019
https://doi.org/10.1147/rd.511.0019
Autor:
Patrick M. Williams, Allan H. Dansky, T. J. McPherson, Timothy G. McNamara, David A. Webber, Dale Eugene Hoffman, Michael Alexander Bowen, Robert M. Averill, Gregory A. Northrop, Howard H. Smith, L. Sigal, S. A. McCabe, M. Mayo, Peter J. Camporese, R. F. Hatch, K. G. Barkley Iii
Publikováno v:
IBM Journal of Research and Development. 43:681-706
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8d7400b713ad2447735621ce0091581b
https://doi.org/10.1147/rd.435.0681
https://doi.org/10.1147/rd.435.0681
Autor:
Yuichi Kanda, Bernd Wilhelm, Hermann Kühnle, Toshiaki Kimura, Jagjit Singh Srai, Klaus-Dieter Thoben, Francesco Costanzo, Bruno Lisanti, Patrick M. Williams
Publikováno v:
Springer Handbook of Mechanical Engineering
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f7bf7549b099337e27dc5a27a6891bb3
https://doi.org/10.1007/978-3-540-30738-9_15
https://doi.org/10.1007/978-3-540-30738-9_15
Autor:
Barry Watson Krumm, Gregory A. Northrop, Y.H. Chan, C. Krygowski, Timothy G. McNamara, T. J. McPherson, Eric M. Schwarz, John Stephen Liptay, M. Check, Dale Eugene Hoffman, D. Webber, M. Mayo, K. Barkley, Y.-H. Chan, S. Carey, R. Averill, Charles F. Webb, William V. Huott, L.S.T. Siegel, Patrick M. Williams
Publikováno v:
1999 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC. First Edition (Cat. No.99CH36278).
The IBM G5 system is a fifth-generation CMOS server for the S/390 line of products with functionality improvements such as an instruction branch target buffer (BTB) and an IEEE compliant binary floating-point. The microprocessor operates at 600 MHz a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::04ae8b95e290ef8247a1f34b8453ff3e
https://doi.org/10.1109/isscc.1999.759131
https://doi.org/10.1109/isscc.1999.759131
Publikováno v:
Electrical Performance of Electronic Packaging.
A methodology based on closed form expressions is applied to predict noise and timing impact due U) line to line coupling. Statistical results for a S/3W microprocessor is shown for over 20,000 nets. The trends in CMOS chip design have all been conve
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::868b11f75bdcc83b3b9953bfa2b748ee
https://doi.org/10.1109/epep.1996.564770
https://doi.org/10.1109/epep.1996.564770
Autor:
R. F. Hatch, Y.H. Chan, T. McPherson, Dale Eugene Hoffman, Timothy G. McNamara, A. Pelella, Brian W. Curran, L. Sigal, R. M. Averill, Greg Northrop, Patrick M. Williams, A. Dansky
Publikováno v:
ICCD
High frequency microprocessor designs require rigorous design guidelines, design methodology advancements, and novel approaches in circuit design style for processors operating in the high megahertz range. Timing closure becomes the single most impor
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4efcc492604aaadeb1c457f12a78163a
https://doi.org/10.1109/iccd.1998.727059
https://doi.org/10.1109/iccd.1998.727059
Autor:
M. Mayo, S. Carey, Dale Eugene Hoffman, Yuen Chan, T. Koprowski, Brian W. Curran, R. Crea, Yiu-Hing Chan, F. Tanzi, Gregory A. Northrop, Patrick M. Williams, R. Clemen, Howard H. Smith, Peter J. Camporese, T. J. McPherson, L. Sigal
Publikováno v:
2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177).
The first 64 b S/390 microprocessor implemented in a 0.18 /spl mu/m, 7-level copper interconnect bulk CMOS process, runs operating system and applications at 1.1 GHz. The frequency is achieved with interconnect width and repeater optimization, select
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5956390165c4d09f08d5369e4c7ecfe2
https://doi.org/10.1109/isscc.2001.912620
https://doi.org/10.1109/isscc.2001.912620