Zobrazeno 1 - 9
of 9
pro vyhledávání: '"Patrick J. Meaney"'
Autor:
Howard H. Smith, Antonio R. Pelella, Patrick J. Meaney, Pradip Patel, D. Malone, G. Gerwig, S. Carey, William V. Huott, James D. Warnock, David L. Rude, Thomas Strach, Frank Malgioglio, Huajun Wen, Daniel Rodko, Yuen Chan, Paul A. Bunce, Jose L. Neves, Yiu-Hing Chan, John Davis
Publikováno v:
IEEE Journal of Solid-State Circuits. 47:151-163
This paper describes the circuit and physical design features of the z196 processor chip, implemented in a 45 nm SOI technology. The chip contains 4 super-scalar, out-of-order processor cores, running at 5.2 GHz, on a die with an area of 512 mm2 cont
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e540a64872963d1dea4d5479786ea8c0
https://doi.org/10.1109/jssc.2011.2169308
https://doi.org/10.1109/jssc.2011.2169308
Autor:
William J. Clarke, N. E. Weber, I. N. Modi, M. L. Fair, W. Fischer, Patrick J. Meaney, F. Freier, Luiz C. Alves, Christopher R. Conklin, Scott Barnett Swaney
Publikováno v:
IBM Journal of Research and Development. 48:519-534
The IBM eServerTM zSeries® Model z990 offers customers significant new opportunity for server growth while preserving and enhancing server availability. The z990 provides vertical growth capability by introducing the concurrent addition of processor
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::eec3aaab81e44feab1c16e1d325ad39d
https://doi.org/10.1147/rd.483.0519
https://doi.org/10.1147/rd.483.0519
Autor:
Patrick J. Meaney, G. C. Wellwood, M. L. Fair, B. K. Tolan, I. N. Modi, F. Freier, N. E. Weber, William J. Clarke, Luiz C. Alves, C. L. Chen
Publikováno v:
IBM Journal of Research and Development. 46:503-521
The IBM eServer zSeries™ Model 900, or z900, has been designed with major enhancements for hardware reliability, availability, and serviceability (RAS) in support of the zSeries RAS strategy, the eServer self-management technologies, and the z900 d
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6bb8685ed6a8e7eeb1c6018d8fe6cdd5
https://doi.org/10.1147/rd.464.0503
https://doi.org/10.1147/rd.464.0503
Autor:
Michael A. Blake, C. B. Ford, W. W. Shen, Patrick J. Meaney, Michael Fee, Pak-Kin Mak, P. R. Turgeon, R. Seigler
Publikováno v:
IBM Journal of Research and Development. 43:661-670
The IBM S/390® fifth-generation CMOS-based server (more commonly known as the G5) produced a dramatic improvement in system-level performance in comparison with its predecessor, the G4. Much of this improvement can be attributed to an innovative app
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e24498af97bc52498a18211add9b4af3
https://doi.org/10.1147/rd.435.0661
https://doi.org/10.1147/rd.435.0661
Autor:
Brian W. Curran, Y.-H. Chan, S. Carey, Patrick J. Meaney, M. Mayo, L. Sigal, Guenter Mayer, Michael Fee, Lee Evan Eisen, Eric M. Schwarz, Pak-Kin Mak, D. Malone, Frank Malgioglio, Howard H. Smith, T. J. McPherson, Huajun Wen, Thomas Strach, Michael H. Wood, William V. Huott, M. J. Saccamango, James D. Warnock, S. Weitzel, Yuen H. Chan, David L. Rude, R. Averill, Donald W. Plass, Charles F. Webb
Publikováno v:
ISSCC
The microprocessor chip for the IBM zEnterprise 196 (z 196) system is a high-frequency, high-performance design that adds support for out-of-order instruction execution and increases operating frequency by almost 20% compared to the previous 65nm des
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9a548ff33e6ac1c480eb79f9a8031262
https://doi.org/10.1109/isscc.2011.5746223
https://doi.org/10.1109/isscc.2011.5746223
Autor:
Patrick J. Meaney, Luiz C. Alves, Luis A. Lastras-Montano, Eldee Stephens, James A. O'Connor, Barry M. Trager
Publikováno v:
ITA
In this article we describe a class of error control codes called “diff-MDS” codes that are custom designed for highly resilient computer memory storage. The error scenarios of concern range from simple single bit errors, to memory chip failures
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3f16425501fb5d180cfefd8655016277
https://doi.org/10.1109/ita.2011.5743586
https://doi.org/10.1109/ita.2011.5743586
Autor:
R. D. Siegl, Patrick J. Meaney, G. D. Gilda, R. K. Dong, M. R. Hodges, D. J. Buerkle, L. D. Curley
Publikováno v:
IBM Journal of Research and Development. 59:4:1-4:11
The IBM z13™ system uses the new IBM Centaur memory buffer chip, along with system topology changes, to more than triple system memory capacity (relative to the IBM zEnterprise™ EC12) to 10 TB, and...
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::649d7d75bec7efcfecda7e583ebf2693
https://doi.org/10.1147/jrd.2015.2429031
https://doi.org/10.1147/jrd.2015.2429031
Autor:
Michael Fee, William Wu Shen, Michael A. Blake, Kevin W. Kark, Patrick J. Meaney, Kathryn M. Jackson, A.R. Seigler, Frank Malgioglio, Carl B. Ford, P. R. Turgeon, E. Pell, Donald W. Plass, Christine C. Jones, W. Scarpero, G. Wellwood, A. Zuckerman, G. Holmes, Pak-Kin Mak, Gary Alan Vanhuben, Gary E. Strait, M. Fischer
Publikováno v:
1999 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC. First Edition (Cat. No.99CH36278).
Although a microprocessor's maximum frequency and internal design are important, the storage hierarchy is the primary reason for the large system performance improvement of the S/390 G5 compared to the G4. The improvement is achieved with an L2 cache
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::251198bd485b6f5ff67cd4416e063845
https://doi.org/10.1109/isscc.1999.759132
https://doi.org/10.1109/isscc.1999.759132
Autor:
Patrick J. Meaney, Judy S. Johnson, Eldee Stephens, Vesselina K. Papazova, Luiz C. Alves, James A. O'Connor, William J. Clarke, Luis A. Lastras-Montano
Publikováno v:
IBM Journal of Research and Development. 56:4:1-4:11
The IBM zEnterprise® system introduced a new and innovative redundant array of independent memory (RAIM) subsystem design as a standard feature on all zEnterprise servers. It protects the server from single-channel errors such as sudden control, bus
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b4c3f2681069fd8679269d8a03c62d3a
https://doi.org/10.1147/jrd.2011.2177106
https://doi.org/10.1147/jrd.2011.2177106