Zobrazeno 1 - 10
of 14
pro vyhledávání: '"Parrish Ralston"'
Autor:
David Fry, Nathanael Ellerhoff, Parrish Ralston, Klaus Wolter, Len Chorosinski, Scott Suko, Venky Sundaram, Richard Calatayud
Publikováno v:
International Symposium on Microelectronics. 2017:000699-000704
Under the DARPA/MTO SHIELD program, a Northrop Grumman led team is developing a supply chain traceability and authentication method to protect against the growing threat of counterfeit electronic parts. The foundation of our SHIELD solution is an adv
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::501706237feabdac99ef6ffc3bf9a999
https://doi.org/10.4071/isom-2017-thp21_112
https://doi.org/10.4071/isom-2017-thp21_112
Autor:
Scott Suko, David Fry, Jamin McCue, Parrish Ralston, David Cross, Bryce Winters, Darnell Lane, Chris Kalaigian, Shuai Zhou
Publikováno v:
RFID
This paper summarizes the simulated and measured performance of major analog blocks contained in an advanced RFID system designed and fabricated in Global Foundries 14nm FinFET technology. These analog blocks were designed and built in support of the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::91995ea6f5c63c845de6479e0a22e7d8
https://doi.org/10.1109/rfid.2019.8719245
https://doi.org/10.1109/rfid.2019.8719245
Publikováno v:
Computer. 49:18-26
Supply-chain traceability and electronics counterfeiting have become increasingly widespread issues for military and commercial electronics systems. In response to a DARPA SHIELD program directive, Northrop Grumman is leading a team to develop tiny,
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::20e947f4295274034453fe9a17eccdfa
https://doi.org/10.1109/mc.2016.262
https://doi.org/10.1109/mc.2016.262
Autor:
H. George Henry, Shalini Gupta, Matthew R. King, Ishan Wathuthanthri, Ron Freitag, Parrish Ralston, Eric J. Stewart, Megan Snook, Robert S. Howell, Justin Parke, Bettina Nechay
Publikováno v:
2016 IEEE MTT-S International Microwave Symposium (IMS).
The Super-Lattice Castellated Field Effect Transistor (SLCFET) uses a super-lattice in the channel region to form multiple parallel current paths in conjunction with castellations etched into that super-lattice to provide a sidewall gate structure. T
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::aba5dc7efcdfa0348437aaacd05fb5cf
https://doi.org/10.1109/mwsym.2016.7540023
https://doi.org/10.1109/mwsym.2016.7540023
Autor:
Nathan Bushyager, Sharon Woodruff, Parrish Ralston, Erik Vick, G. David Ebner, Matthew Lueck, Christopher Hillman, Alan Huffman, Jonathan Hacker, Jeffrey Hartman, Adam Young, Stuart Quade, Dean Malta
Publikováno v:
2016 IEEE 66th Electronic Components and Technology Conference (ECTC).
We report a TSV-last, heterogeneous 3D integration process for millimeter wave solid state tiles for use in the demonstration of a W-band active electronically scanned array (AESA) radar system. Each phased array tile consists of a high speed SiGe Bi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::aaeca6e02bb8a4370dfe05ba5da6fe6b
https://doi.org/10.1109/ectc.2016.103
https://doi.org/10.1109/ectc.2016.103
Publikováno v:
IEEE Journal of Solid-State Circuits. 47:2327-2334
Prior work has demonstrated a new process utilizing room-temperature liquid metal, Galinstan, as an interconnect material for flip-chip bonding. This interconnect forms a flexible bond between chips and carriers, and, therefore, a flip-chip assembly
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f01799fc07246febeebfb1efa63d687e
https://doi.org/10.1109/jssc.2012.2204930
https://doi.org/10.1109/jssc.2012.2204930
Autor:
Parrish Ralston, Karen Renaldo, Shalini Gupta, Ron Freitag, Eric J. Stewart, H. George Henry, Justin Parke, Bettina Nechay, Matthew R. King, R. Chris Clarke, Harlan Carl Cramer, Ishan Wathuthanthri, Megan Snook, Robert S. Howell, Jeffrey Hartman
Publikováno v:
2014 IEEE International Electron Devices Meeting.
NGES reports the development of a novel transistor structure based on a GaN super-lattice channel with a 3D gate, named the SLCFET (Super-Lattice Castellated Field Effect Transistor). Transistor measurements provided median values of I MAX >2.7 A/mm,
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d3cc0644b5e78f273f59abdc631e6b85
https://doi.org/10.1109/iedm.2014.7047033
https://doi.org/10.1109/iedm.2014.7047033
Autor:
Jeff Hartman, Bettina Nechay, Justin Parke, Karen Renaldo, Harlan Carl Cramer, Eric J. Stewart, Robert S. Howell, Parrish Ralston, Megan Snook, Shalini Gupta, Matthew R. King, Ishan Wathuthanthri, H. George Henry, Pavel Borodulin, Ron Freitag
Publikováno v:
2014 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS).
A low loss, high isolation, broadband RF switch has been developed using a novel type of field effect transistor structure that exploits the use of a super-lattice structure in combination with a three dimensional, castellated gate to achieve excelle
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4042329cdf89fe2a7fca99d22d7df114
https://doi.org/10.1109/csics.2014.6978566
https://doi.org/10.1109/csics.2014.6978566
Publikováno v:
2012 IEEE/MTT-S International Microwave Symposium Digest.
This paper presents the characterization of rectangular micro-coaxial transmission lines assembled in a high power test system. In addition to straight transmission lines, vertical solder transitions between stacked layers of rectangular coax are pre
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d021cf1bbc51dd11770521aca391cb0b
https://doi.org/10.1109/mwsym.2012.6259737
https://doi.org/10.1109/mwsym.2012.6259737
Publikováno v:
2011 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS).
Prior work has demonstrated a new process utilizing room temperature liquid metal, galinstan, as an interconnect material for flip chip bonding. This interconnect forms a flexible bond between chips and carriers and therefore a flip chip assembly usi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7f8388bcabd6a050dcdc2a6470a238dd
https://doi.org/10.1109/csics.2011.6062489
https://doi.org/10.1109/csics.2011.6062489