Zobrazeno 1 - 10
of 13
pro vyhledávání: '"Paria Kargar"'
Publikováno v:
International Journal of Circuit Theory and Applications. 50:1297-1316
Publikováno v:
Design and Development of Efficient Energy Systems
Publikováno v:
2021 11th Smart Grid Conference (SGC).
Autor:
Pramod Agarwal, Ruth Agustini, Shakir D. Ahmed, Roger Alves de Oliveira, Gökay Bayrak, Anil Bharadwaj, S. Chakraborty, I. Gerald Christopher Raj, Nirmalya Dhal, Bibiana Petry Ferraz, Renato Ferraz, Davood Ghaderi, Paria Kargar, Mahdi Karimi, Meer A.M. Khan, R. Senthil Kumar, Roberto Chouhy Leborgne, P. Leninpugalhanthi, Vasundhara Mahajan, Suman Maiti, José L. Martínez-Ramos, Hari Om Gupta, P. Pandiyan, Sreekesh K. Pillai, Subrat Sahoo, P. Sanjeevikumar, S. Saravanan, Md Shafiullah, C. Sharmeela, P. Sivaraman, Kazem Varesi, Pedro J. Zarco-Periñán, Fco. Javier Zarco-Soto
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::cd11ea3550c25cf587f78b0d37033def
https://doi.org/10.1016/b978-0-12-823346-7.01002-1
https://doi.org/10.1016/b978-0-12-823346-7.01002-1
Publikováno v:
2020 11th Power Electronics, Drive Systems, and Technologies Conference (PEDSTC).
This paper introduces a novel basic single-phase Switched-Capacitor Based Multi-Level Inverter (SCBMLI) topology that benefits from modularity, boosting capability, self-voltage balancing of capacitors and low Blocking Voltage ( $BV$ ) on switches. D
Publikováno v:
2019 International Power System Conference (PSC).
This paper proposes a new 11-level high step-up switched-capacitor based inverter topology. The suggested topology uses only one DC source and can produce a gain of 5. Also it can produce high ratios of steps per switches, gate driver circuits and DC
Publikováno v:
2019 International Power System Conference (PSC).
In this paper, two new switched-capacitor based 5 and 9-level inverter topologies have been suggested. Simple structure, natural voltage balancing of capacitors (easy control strategy), low voltage stress on switches as well as step-up capability (pr
Publikováno v:
2019 Iranian Conference on Renewable Energy & Distributed Generation (ICREDG).
This paper proposes a new topology for cascaded 35-level inverters. Higher number of produced levels (35 levels in this paper) improves the quality of output voltage and reduces its Total Harmonic Distortion (THD). For producing 35 levels, the sugges
Publikováno v:
2019 Iranian Conference on Renewable Energy & Distributed Generation (ICREDG).
In this paper, a new 31-level Developed H-Bridge based Sub-Multilevel Cell (DHBSMC) is proposed that can be extended to create more steps. The suggested configuration has large number of steps per device count. The suggested DHBSMC has simple structu
Publikováno v:
2019 10th International Power Electronics, Drive Systems and Technologies Conference (PEDSTC).
A new step-up Cascaded Multi-Level Inverter (CMLI) has been proposed in this paper. The proposed basic 35-level topology is composed of 4 DC sources, 2 capacitors, 2 diodes and 12 switches. The sum of input DC sources is 10V dc , where the peak outpu