Zobrazeno 1 - 10
of 15
pro vyhledávání: '"Paolo Cusinato"'
Publikováno v:
International Journal of Circuit Theory and Applications. 32:209-222
This paper describes the design and the implementation of a 6th-order bandpass ΣΔ modulator to be used for IF digitizing at 10.7 MHz of a broadcasting FM radio signal. The modulator is sampled at 37.05 MHz. This sampling frequency value allows to o
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::a7d393cdf3e00072b4de9b193a28e899
https://doi.org/10.1002/cta.277
https://doi.org/10.1002/cta.277
Autor:
Paolo Cusinato
Publikováno v:
IEEE Journal of Solid-State Circuits. 39:960-966
The analog power amplifier (PA) control loop of a fully integrated GSM/GPRS quad-band transceiver, suitable for GSM 850, GSM 900, DCS 1800, PCS 1900, and GPRS class 12 applications is presented. The control loop is based on a fully integrated PA cont
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0653a2cbdc955a1808d49f7c1ae540bf
https://doi.org/10.1109/jssc.2004.827799
https://doi.org/10.1109/jssc.2004.827799
Autor:
F. Galant, S. Cercelaru, Eric Duvivier, G. Sirna, Biagio Bisanti, N. Vallespin, Jean-Christophe Jiguet, Paolo Cusinato, Gianni Puccio, L. Carpineto, S. Cipriani, Francesco Coppola, F. Chalet
Publikováno v:
IEEE Journal of Solid-State Circuits. 38:2249-2257
A GPRS GSM850/GSM/DCS/PCS fully integrated transceiver occupies 14mm/sup 2/ in 0.35/spl mu/m SiGe technology. A direct conversion receiver, transmitter, synthesizer, VCO, voltage regulators and loop filters are fully integrated. The chip meets the GP
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c4d34eba67699eea7cc894112a7b6a28
https://doi.org/10.1109/jssc.2003.819089
https://doi.org/10.1109/jssc.2003.819089
Publikováno v:
Analog Integrated Circuits and Signal Processing. 36:7-19
Stability and saturation recovery are a key concern in High-order Switched Capacitor (SC) ΣΔ modulators, since they are conditionally stable architectures. A novel digital technique, which allows to detect instability in the digital domain, a fast
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::00c01ce5bc34f8c74537661aec03e3f5
https://doi.org/10.1023/a:1024481126518
https://doi.org/10.1023/a:1024481126518
Publikováno v:
IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing. 48:952-960
Power consumption is a key point in the design of high-speed switched capacitor (SC) circuits, which efficiently implement a number of analog functions. Among them, SC EA modulators are very popular for analog-to-digital conversion. In this kind of c
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7f957754718b5356fa0c964c4d5e0f90
https://doi.org/10.1109/82.974784
https://doi.org/10.1109/82.974784
Publikováno v:
IEEE Transactions on Consumer Electronics. 46:343-352
A BiCMOS analog front-end to be used in a complete two-chip set with a digital signal processor for compact disc (CD) applications is presented. The proposed device exchanges data with the digital counterpart by means of a I2C-like bus serial interfa
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::946843b567849d3d08d40cd1615469ed
https://doi.org/10.1109/30.846668
https://doi.org/10.1109/30.846668
Autor:
Christian Sorace, G. Sirna, Eric Duvivier, S. Cipriani, F. Monchal, Paolo Cusinato, L. Carpineto
Publikováno v:
Proceedings of the 12th IEEE Mediterranean Electrotechnical Conference (IEEE Cat. No.04CH37521).
In this paper, a pure digital CMOS (90nm) dual-band GSM low IF (100kHz) receiver section is presented. The incoming RF signal is first amplified using two differential LNAs (one for GSM and the other for DCS) and then down converted by two passive mi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e91db1138ee42958d41197d7c8a1a5b2
https://doi.org/10.1109/melcon.2004.1346795
https://doi.org/10.1109/melcon.2004.1346795
Autor:
Paolo Cusinato
Publikováno v:
Proceedings of the 12th IEEE Mediterranean Electrotechnical Conference (IEEE Cat. No.04CH37521).
A configurable W-CDMA baseband down-link (BDL) channel suitable to be used with both direct conversion (DIR) and superheterodyne (SHT) architectures has been integrated in a double-poly 0.6/spl mu/m CMOS technology. The BDL is an analog signal proces
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::917fd56c1ec65d5c5945dd879f65dbe3
https://doi.org/10.1109/melcon.2004.1346799
https://doi.org/10.1109/melcon.2004.1346799
Autor:
Paolo Cusinato
Publikováno v:
ISCAS (1)
A configurable W-CDMA baseband down-link (BDL) channel suitable to be used with both direct conversion (DIR) and superheterodyne (SHT) architectures has been integrated in a double-poly 0.6 /spl mu/m CMOS technology. The BDL is an analog signal proce
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::64109fdb9feb40a05b58155e2504cf08
https://doi.org/10.1109/iscas.2004.1328301
https://doi.org/10.1109/iscas.2004.1328301
Autor:
Paolo Cusinato, Franco Maloberti, Andrea Baschirotto, F. Francesconi, S. Brigati, Piero Malcovati
This paper presents a complete set of blocks implemented in the popular MATLAB SIMULINK environment, which allows designers to perform time-domain behavioral simulations of switched-capacitor (SC) sigma-delta (/spl Sigma//spl Delta/) modulators. The
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::26bfeee3dfd2fcd3ddaf9613effd47dc
http://hdl.handle.net/10281/36855
http://hdl.handle.net/10281/36855
