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Autor:
Pahwa, Ramanpreet S, Ho, Soon Wee, Qin, Ren, Chang, Richard, Min, Oo Zaw, Jie, Wang, Rao, Vempati Srinivasa, Nwe, Tin Lay, Yang, Yanjing, Neumann, Jens Timo, Pichumani, Ramani, Gregorich, Thomas
Publikováno v:
International Wafer-Level Packaging Conference (IWLPC) 2020
For over 40 years lithographic silicon scaling has driven circuit integration and performance improvement in the semiconductor industry. As silicon scaling slows down, the industry is increasingly dependent on IC package technologies to contribute to
Externí odkaz:
http://arxiv.org/abs/2103.04838
