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Autor:
P.P. Apte, Sharad Saxena, R. Burch, Joseph C. Davis, Karthik Vasanth, P.K. Mozumder, S. Rao, C. Fernando
Publikováno v:
IEEE Transactions on Semiconductor Manufacturing. 11:527-536
Run-to-run and supervisory control algorithms determine the equipment recipe to produce a desired output wafer state given the incoming wafer state and the current equipment model. For simple, low-dimensional equipment models, this problem is not dif
Publikováno v:
IEEE Transactions on Semiconductor Manufacturing. 11:475-485
Process technology development constitutes a significant cost in manufacturing integrated circuits. In this paper, we present a model-based approach for developing new process technology rapidly and inexpensively, using the salicide process to demons
Autor:
P.P. Apte, Jiunn-Yann Tsai
Publikováno v:
Thin Solid Films. 270:589-595
A reliable TiSi 2 TiN stack thickness model is an essential component for modeling the titanium salicide process, and such a model is not well-developed in current process simulators and in the literature. To determine this model, a design of experim
Autor:
Paul J. Gyugyi, Charles D. Schaper, Butrus T. Khuri-Yakub, Fahrettin Levent Degertekin, Mehrdad M. Moslehi, S.C. Wood, Krishna C. Saraswat, P. Dankoski, Gene F. Franklin, Len Booth, Yunzhong Chen, J. Pei, P.P. Apte, Y.J. Lee
Publikováno v:
IEEE Transactions on Semiconductor Manufacturing. 7:159-175
This paper presents an overview of research at Stanford University on the development of concepts of a programmable factory, based on a new generation of flexible multifunctional equipment implemented in a smaller flexible factory. This approach is d
Autor:
P.P. Apte, Krishna C. Saraswat
Publikováno v:
IEEE Transactions on Electron Devices. 41:1595-1602
Ultrathin gate and tunnel oxides in MOS devices are subjected to high-field stress during device operation, which degrades the oxide and eventually causes dielectric breakdown. Oxide reliability, therefore, is a key concern in technology scaling for
Autor:
Q.Z. Hong, Jorge A. Kittl, G.A. Dixit, P.P. Apte, Amitava Chatterjee, Ih-Chin Chen, Douglas A. Prinslow
Publikováno v:
Proceedings of Technical Papers. International Symposium on VLSI Technology, Systems, and Applications.
Publikováno v:
IEEE Electron Device Letters. 17:506-508
A new process technology has been demonstrated that successfully addresses an urgent challenge in silicide technology scaling: the formation of low-resistivity TiSi/sub 2/ on sub-half-micrometer polysilicon lines. The key idea is the use of a TiN cap
Publikováno v:
Applied Physics Letters. 67:2308-2310
A detailed kinetic study of the C49 to C54 phase transformation in TiSi2 thin films was performed, to obtain the full time, temperature, and linewidth dependence of the fraction transformed during rapid thermal annealing on patterned deep‐sub‐mic
Publikováno v:
International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217).
We present the first integrated simulation and modeling approach for the silicide-source/drain structure, and for the silicide-diffusion contact resistance; thus, providing the critical link between electrical performance and the processing/structura