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pro vyhledávání: '"P.J. Starvaski"'
Autor:
V. Peng, Sridhar Samudrala, Elizabeth M. Cooper, W.V. Herrick, A Fisher, D.E. Sanders, Randy L. Allmon, W.H. Durdan, Paul E. Gronowski, D. Kravitz, P.J. Starvaski, L. Madden, R.C. Marcello, V.K. Maheshwari, G.G. Mills, J.F. Brown, William J. Bowhill, W.R. Wheeler, M. Mittal, W.J. Grundmann, M.N. Gavrielov, J.D. Pickholtz, B.J. Benschneider, R.L. Stamm
Publikováno v:
IEEE International Solid-State Circuits Conference.
A four-chip custom VLSI implementation of a 32-b computer comprised of a CPU, a secondary cache controller, a floating-point accelerator, and a clock generator is described. It operates at a cycle time of 28 ns and is compatible with an existing comp
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::29c00422818686241ddc04191e4d092c
https://doi.org/10.1109/isscc.1989.48187
https://doi.org/10.1109/isscc.1989.48187
