Zobrazeno 1 - 6
of 6
pro vyhledávání: '"Owen W. Jungroth"'
Autor:
Ali Khakifirooz, Eduardo Anaya, Sriram Balasubrahrmanyam, Geoff Bennett, Daniel Castro, John Egler, Kuangchan Fan, Rifat Ferdous, Kartik Ganapathi, Omar Guzman, Chang Wan Ha, Rezaul Haque, Vinaya Harish, Majid Jalalifar, Owen W. Jungroth, Sung-Taeg Kang, Golnaz Karbasian, Jee-Yeon Kim, Siyue Li, Aliasgar S. Madraswala, Srivijay Maddukuri, Amr Mohammed, Shanmathi Mookiah, Shashi Nagabhushan, Binh Ngo, Deep Patel, Sai Kumar Poosarla, Naveen V. Prabhu, Carlos Quiroga, Shantanu Rajwade, Ahsanur Rahman, Jalpa Shah, Rohit S. Shenoy, Ebenezer Tachie Menson, Archana Tankasala, Sandeep Krishna Thirumala, Sagar Upadhyay, Krishnasree Upadhyayula, Ashley Velasco, Nanda Kishore Babu Vemula, Bhaskar Venkataramaiah, Jiantao Zhou, Bharat M. Pathak, Pranav Kalavade
Publikováno v:
2023 IEEE International Solid- State Circuits Conference (ISSCC).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::177753a2ce8bb9f42c2ea9a8a3d32f41
https://doi.org/10.1109/isscc42615.2023.10067616
https://doi.org/10.1109/isscc42615.2023.10067616
Autor:
Rezaul Haque, Aliasgar S. Madraswala, Cindy Sun, Bharat M. Pathak, Jacqueline Snyder, Kristopher H. Gaewsky, Ali Khakifirooz, Binh Ngo, Chang Wan Ha, Prabhu Naveen Vittal, Karthikeyan Ramamurthi, Fastow Richard, Shantanu R. Rajwade, Owen W. Jungroth, Deepak Thimmegowda, Pranav Kalavade, Rohit S. Shenoy, Steven Law, Sriram Balasubrahmanyam
Publikováno v:
ISSCC
Continued improvement in the 3D NAND bit density is essential to satisfy the exponentially growing demand for data storage. The transition from 3b/cell (TLC) to 4b/cell (QLC) is a significant step towards delivering higher bit density. The increased
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::eb44bd4a0a1dc88696b6b21df77445d2
https://doi.org/10.1109/isscc42613.2021.9365777
https://doi.org/10.1109/isscc42613.2021.9365777
Autor:
Katie Nguyen, Yasuhiro Takashima, Chris Haid, Martin Szwarc, Vikram Mehta, Owen W. Jungroth, Andy Sendrowski, Hiroyuki Yokoyama, Satoru Tamada, Raymond W. Zeng, Bharat M. Pathak, Matthew Goldman, Tetsuji Manabe, Darshak Udeshi, Ravinder Kajley, Navneet Chalagalla, Tom Ryan, Daniel Elmhurst, Toru Tanzawa, Takaaki Ichikawa, William Sheung, Atif Huq, Mase J. Taub, Joel T. Jorgensen, Yoko Oikawa, Nishant Kajla, Midori Morooka, Tomoharu Tanaka, Koichi Kawai, Jiro Kishimoto, Dan Chu, Shigekazu Yamada, Rod Rozman, Ali Madraswala
Publikováno v:
ISSCC
As applications for NAND continue to grow and cost remains a primary market driver, it is necessary to deliver increased storage capacities at smaller process lithography while meeting high performance requirements [1,2]. Design plays a pivotal role
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ae7b73a5ab74e41dd0355efe63091266
https://doi.org/10.1109/isscc.2009.4977395
https://doi.org/10.1109/isscc.2009.4977395
Autor:
Harry Q. Pon, Vishram Prakash Dalvi, Keytaek Lee, Owen W. Jungroth, Richard J. Durante, S. Bell, Rodney R. Rozman, Keith F. Underwood, Alan Baker, E. Baer, Mamun Ur Rashid, Jerry A. Kreifels, Chakravarthy Yarlagadda, Marcus E. Landgraf, Ranjeet Alexis, Joseph Tsang, Mickey L. Fandrich
Publikováno v:
Proceedings of IEEE International Solid-State Circuits Conference - ISSCC '94.
The design of this flash memory is governed by the following considerations. Use of flash memory to store both data and code requires fast write with interruptible erase. Portable systems operate at 3.3 V to optimize battery life, while the desktop r
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::cb2244b6b90138fa186ac7efe93f34f7
https://doi.org/10.1109/isscc.1994.344694
https://doi.org/10.1109/isscc.1994.344694
Autor:
Steven E. Wells, P. Dix, R.A. Lodenquai, V. Niles Kynett, J. Anderson, Mark Winston, Jerry A. Kreifels, Owen W. Jungroth, Mickey L. Fandrich, L. Yang, B. Vajdic
Publikováno v:
IEEE Journal of Solid-State Circuits. 24:1259-1264
Describes the design and performance of a 245-mil/sup 2/ 1-Mbit (128K*8) flash memory targeted for in-system reprogrammable applications. Developed from a 1.0- mu m EPROM-base technology, the 15.2- mu m/sup 2/ single-transistor EPROM tunnel oxide (ET
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c94b03835218327c9d06ad92e0204fd7
https://doi.org/10.1109/jssc.1989.572591
https://doi.org/10.1109/jssc.1989.572591
Autor:
Owen W. Jungroth, Mickey L. Fandrich, Jerry A. Kreifels, Steven E. Wells, Virgil Niles Kynett, Mark Winston, Alan Baker, George P. Hoekstra
Publikováno v:
IEEE Journal of Solid-State Circuits. 23:1157-1163
The authors describe the design and performance of a 192-mil/sup 2/ 256 K (32 K*8) flash memory targeted for in-system reprogrammable applications. Developed from a 1.5 mu m EPROM base technology with a one-transistor 6*6- mu m/sup 2/ cell, the devic
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::bf74185001e793fdad48e143b7661b84
https://doi.org/10.1109/4.5938
https://doi.org/10.1109/4.5938