Zobrazeno 1 - 8
of 8
pro vyhledávání: '"Oriol Arcas-Abella"'
Autor:
D. Montero, Oriol Arcas-Abella, Rene Serral-Gracia, Ivan Romero, Rodolfo A. Milito, Francesco Ciaccia, Mario Nemirovsky
Publikováno v:
ICCCN
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
We present a control module for software edge routers called Receive Window Modulation - RWM. Its main objective is to mitigate what we define as self-induced congestion: the result of traffic emission patterns at the source that cause buffering and
Autor:
Oscar Palomar, Oriol Arcas-Abella, Timothy Hayes, Adria Armejach, Behzad Salami, Gorker Alp Malazgirt, Nehir Sonmez
Publikováno v:
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
Universitat Politècnica de Catalunya (UPC)
Database management systems have become an indispensable tool for industry, government, and academia, and form a significant component of modern datacenters. They can be used in a multitude of scenarios, including online analytical processing, data m
Autor:
Nehir Sonmez, Oriol Arcas-Abella
Publikováno v:
FPGAs for Software Programmers ISBN: 9783319264066
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::87830ead2f3d77b63e500ef883494aad
https://doi.org/10.1007/978-3-319-26408-0_9
https://doi.org/10.1007/978-3-319-26408-0_9
High Level Synthesis (HLS) languages and tools are emerging as the most promising technique to make FPGAs more accessible to software developers. These tools raise the level of abstraction and feature high-level language constructs that can considera
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=od______2295::c06d5d414af5fe7edd4f5e2459e303af
http://www.manchester.ac.uk/escholar/uk-ac-man-scw:228253
http://www.manchester.ac.uk/escholar/uk-ac-man-scw:228253
Autor:
Oriol Arcas-Abella, Adrian Cristal, Geoffrey Ndu, Wei Song, Mikel Luján, Javier Navaridas, Nehir Sonmez, John Mawer, Adria Armejach, Mohsen Ghasempour
Publikováno v:
Recercat. Dipósit de la Recerca de Catalunya
Universitat Jaume I
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
FPL
Universitat Jaume I
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
FPL
High Level Synthesis (HLS) languages and tools are emerging as the most promising technique to make FPGAs more accessible to software developers. Nevertheless, picking the most suitable HLS for a certain class of algorithms depends on requirements su
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::94618354c9f3306b879a1949447e834a
http://hdl.handle.net/2117/25882
http://hdl.handle.net/2117/25882
Publikováno v:
Recercat. Dipósit de la Recerca de Catalunya
instname
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
instname
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
With the rise of Big Data, providing high-performance query processing capabilities through the acceleration of the database analytic has gained significant attention. Leveraging Field Programmable Gate Array (FPGA) technology, this approach can lead
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::dd046994d204332b68dc419b0a512dc6
http://hdl.handle.net/2117/104440
http://hdl.handle.net/2117/104440
Publikováno v:
Recercat. Dipósit de la Recerca de Catalunya
instname
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
FCCM
instname
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
FCCM
In this paper we present HATCH, a novel hash join engine. We follow a new design point which enables us to effectively cache the hash table entries in fast BRAM resources, meanwhile supporting collision resolution in hardware. HATCH enables us to hav
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::85e662d49fedbeb42c5a56e73a118ddc
http://hdl.handle.net/2117/88525
http://hdl.handle.net/2117/88525
Publikováno v:
Recercat. Dipósit de la Recerca de Catalunya
instname
FCCM
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
instname
FCCM
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
Simulators are key tools for computer architecture research. However, multicore architectures represent a highly complex challenge for software simulators, which may suffer from fidelity loss and long execution times. FPGAs can simulate multicore arc
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::abc316d98611b4b1982b7ec20ad44e29
http://hdl.handle.net/2117/88604
http://hdl.handle.net/2117/88604