DPIVSoft-OpenCL: A multicore CPU–GPU accelerated open-source code for 2D Particle Image Velocimetry

Autor: Jorge Aguilar-Cabello, Luis Parras, Carlos del Pino

Publikováno v: SoftwareX, Vol 20, Iss , Pp 101256- (2022)

We present a translation of the original Matlab DPIVSoft code to a complete open source code implemented in Python, to perform Particle Image Velocimetry (PIV) in two-dimensions, in parallel, and with interrogation window shifting along with the doub

Externí odkaz: https://doaj.org/article/82a641e44a7d466b82610025580d14ca

Implementation and optimisation of pulse compression algorithm on open CL-based FPGA

Autor: Yingxu Feng, Shanqing Hu, Xingming Li, Jiacheng Yu

Publikováno v: The Journal of Engineering (2019)

As Moore's law meets bottlenecks, the demand for heterogeneous parallel processing systems is increasing. Field-programmable gate arrays (FPGAs) are becoming more efficient acceleration devices due to their powerful processing performance, and the CP

Externí odkaz: https://doaj.org/article/fb55f4546c34467fa080626b1db0979a

Image Histogram Equalization using Parallel Processing (GPU computation) in Open CL to correct the Contrast of Images

Autor: Bahar Uddin Mahmud, Shib Shankar Bose, Afsana Sharmin

Publikováno v: Journal of Computer Aided Parallel Programming 5(1) 1-18
ZENODO

In Histogram equalization is a powerful way to correct the contrast of over exposed or under exposed images. These problems result to either high bright images or dark images. These problems can be solved by adjusting the contrast using histogram equ

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Energy proportional computing with OpenCL on a FPGA-based overlay architecture

Autor: Awais Hussain Sani, Jose L Nunez-Yanez

Publikováno v: NORCAS
Sani, A H & Nunez-Yanez, J L 2016, Energy proportional computing with OpenCL on a FPGA-based overlay architecture . in Proceedings of the 2nd IEEE NORCAS Conference (NORCAS 2016) ., 7792905, Institute of Electrical and Electronics Engineers (IEEE), 2nd IEEE Nordic Circuits and Systems Conference, NORCAS 2016, Copenhagen, Denmark, 1/11/16 . https://doi.org/10.1109/NORCHIP.2016.7792905

This paper proposes an architecture inspired by ARM big.LITTLE that combines a hardened host with a cluster of soft processors of different complexities, performance and energy profiles. This coarse-grained FPGA overlay architecture results in a hard

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::582f8684d878a508d63c55ed7f7b7891
https://doi.org/10.1109/norchip.2016.7792905