TCAD investigation of zero-cost high voltage transistor architectures for logic memory circuits

Autor: K. Coulié, Jordan Locati, Stephan Niel, Vincenzo Della Marca, Olivier Paulet, Julien Delalleau, J. Innocenti, Arnaud Regnier, Christian Rivero

Publikováno v: 2019 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)
2019 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Sep 2019, Udine, Italy. pp.1-4, ⟨10.1109/SISPAD.2019.8870384⟩

International audience; In this paper, a new device architecture has been studied by TCAD process simulations in order to provide the improvements on the electrical characteristics. We focus mainly on the drain-bulk junction breakdown voltage, of a d

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::49310d915e8db6f39455c6c174b89a5f
https://hal.archives-ouvertes.fr/hal-02332336