Zobrazeno 1 - 7
of 7
pro vyhledávání: '"Olivier Callen"'
Autor:
Kedar Janardan Dhori, Promod Kumar, Christophe Lecocq, Pascal Urard, Olivier Callen, Florian Cacho, Maryline Parra, Prashant Pandey, Daniel Noblet
Publikováno v:
2022 35th International Conference on VLSI Design and 2022 21st International Conference on Embedded Systems (VLSID).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::14315b6c780a17300042b235e1c399e9
https://doi.org/10.1109/vlsid2022.2022.00050
https://doi.org/10.1109/vlsid2022.2022.00050
Autor:
Joseph Nguyen, Turgis, D., David Bonciani, Brice Lhomme, Yann Carminati, Olivier Callen, Guillaume Guirleo, Lorenzo Ciampolini, gerard ghibaudo
Publikováno v:
HAL
W07 International Workshop on Emerging Memory Solutions
W07 International Workshop on Emerging Memory Solutions, Mar 2016, Dresden, Germany
W07 International Workshop on Emerging Memory Solutions
W07 International Workshop on Emerging Memory Solutions, Mar 2016, Dresden, Germany
W07.12.4; International audience
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::a96c1d2dfd24be84869a2d46fe15cca8
https://hal.archives-ouvertes.fr/hal-02051768
https://hal.archives-ouvertes.fr/hal-02051768
Autor:
Olivier Callen, Daniel Noblet, Amit Chhabra, Siddharth Gupta, Shamsi Azmi, Pierre Malinge, Lorenzo Ciampolini, Dibya Dipti, Sebastien Haendler, Nicolas Planes, Christophe Lecocq, Shishir Kumar, David Turgis
Publikováno v:
Journal of Low Power Electronics. 8:106-112
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::35d0a21742e2c4a344548f0b5b6f6c8d
https://doi.org/10.1166/jolpe.2012.1176
https://doi.org/10.1166/jolpe.2012.1176
Autor:
Vincent Mosser, Olivier Callen
Publikováno v:
Materials Science and Engineering: B. 80:142-146
This paper deals with semiconductor/dielectric interface characterization, and in particular with GaAs/dielectric interface. A new electrical method of investigation, constant Fermi level transient spectroscopy (CFTS), is explained. It is based on MI
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ef320c24d8daa49c4d26c0f4b1f7cc75
https://doi.org/10.1016/s0921-5107(00)00636-x
https://doi.org/10.1016/s0921-5107(00)00636-x
Publikováno v:
Materials Science and Engineering: B. 66:157-161
Two new methods are presented for the characterization of the upper (dielectrics/semiconductor) and lower (epilayer/substrate) boundary conditions for devices using planar conduction in epilayers grown on SI-GaAs substrates. They make use of the same
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::dc41a90355a3673fc94b963979c887ab
https://doi.org/10.1016/s0921-5107(99)00100-2
https://doi.org/10.1016/s0921-5107(99)00100-2
Publikováno v:
ESSCIRC
Following the circuit integration trend, the process monitoring structures need to predict the production circuits reliability while keeping test time small and preserving the wafer area. The design presented monitors a 40nm CMOS bitcell failure evol
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::44013d8d2b5b8c70b2550e2e7fc4d94b
https://doi.org/10.1109/esscirc.2010.5619718
https://doi.org/10.1109/esscirc.2010.5619718
Autor:
Arnaud Epinat, Robin Wilson, N. Vijayaraghavan, Olivier Callen, Matthieu Sautier, Ryan Ross, Sebastien Fabre, Paul Simon
Publikováno v:
ISQED
In order to maximize the yield of random logic in today's advanced Deep Sub-Micron CMOS technologies we have developed a complete yield enhancement methodology for Cmos standard cells. This methodology based on a test vehicle approach covers design,
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::97773a5c76a426829500a7b627720f10
https://doi.org/10.1109/isqed.2006.147
https://doi.org/10.1109/isqed.2006.147