Zobrazeno 1 - 1
of 1
pro vyhledávání: '"Oleh Shepelyuk"'
Publikováno v:
The Experience of Designing and Application of CAD Systems in Microelectronics.
Structural diagram was construct of subsystem identify barriers, built the core, the model of subsystem obstacle detection to FPGA and presents the VHDL model.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::40031dea74f74a409a95e6a3c1d5558b
https://doi.org/10.1109/cadsm.2015.7230850
https://doi.org/10.1109/cadsm.2015.7230850
