Zobrazeno 1 - 10
of 206
pro vyhledávání: '"O. Sidek"'
Publikováno v:
Journal of Applied Sciences. 9:2451-2456
Publikováno v:
Journal of Applied Sciences. 9:1658-1667
Autor:
O. Sidek, M. T. Asmah
Publikováno v:
36th International Electronics Manufacturing Technology Conference.
Fabrication of junctionless sub-micron silicon wire based device using atomic force microscope lithography was presented in this article. The fabricated device consisted of two adjacent probing pads which served as probing pads during electrical char
Autor:
O. Sidek, M. Puvaneswari
Publikováno v:
Jurnal Teknologi.
Perisian tertakrif radio merupakan suatu konsep yang sedang memperoleh momentum bagi merealisasikan terminal radio wayarles berbilang mod, berbilang jalur dan berbilang piawai supaya dapat beroperasi mengikut pelbagai piawai komunikasi mudah alih yan
Publikováno v:
2008 33rd IEEE/CPMT International Electronics Manufacturing Technology Conference (IEMT).
This work introduced a half cut stress concentration (HCSC) region on the surface of MEMS piezoresistive cantilever in order to improve the sensitivity of a cantilever sensor based on loading/force effect. From the available information, by increasin
Publikováno v:
2007 International Conference on Intelligent and Advanced Systems.
This paper describes the FE modeling and analysis for the design of 2.5kW 100 krpm 2-phase permanent magnet brushless motor intended to be used as a high-speed turbine. The electromagnetic characteristics and performance of the motor such as back-emf
Autor:
Chuah Cheow Theng, O. Sidek
Publikováno v:
2006 Thirty-First IEEE/CPMT International Electronics Manufacturing Technology Symposium.
A simulation approach is presented that allow early visibility, guidance, and analysis of clamp placement in early design stage (power template design) on a chip level complexity. The ESD robustness of product is largely attributed to the degree of c
Publikováno v:
2006 IEEE International Conference on Semiconductor Electronics.
Single crystal n-GaAs substrates have been implanted at room temperature with 100 MeV 28Si ions to a dose of 1times1018 ions/m2. The electrical behaviour of these samples has been investigated after implantation and annealing to 850degC by current vo
Publikováno v:
2005 Asia-Pacific Conference on Applied Electromagnetics.
We investigated the layout dependence effect that is caused by different active space, Sa, on 130 nm CMOS transistors leakage current, Ioff. This layout dependence phenomenon is known as STI stress effect. The results show that when Sa changes from 5
Publikováno v:
Proceedings. 7th International Conference on Solid-State and Integrated Circuits Technology, 2004..
The purpose of this paper is to present a HSPICE and a SPECTRE models that are able to describe the temperature effect on CMOS transistor pair mismatch by adding a linear temperature dependent equation to the existing model. Here, we model the mismat