Zobrazeno 1 - 10
of 57
pro vyhledávání: '"O. Belmont"'
Publikováno v:
IEEE Transactions on Appiled Superconductivity. 9:664-667
The superconducting current limiter could bring a solution to a problem not satisfactory solved: the limitation of fault currents under high voltages. We carry out a research and development program based on bulk bismuth materials. They are attractiv
Autor:
M. Barrault, Jacques G. Noudem, J. Sanchez, O. Belmont, Robert Tournier, J. Beille, Pascal Tixador, J.M. Barbut, D. Bourgault, L. Porcar
Publikováno v:
The European Physical Journal Applied Physics. 1:23-26
Des forts courants pulses d'une duree comprise entre 1,25 et 20 ms ont ete appliques a T = 77 K a des conducteurs Bi:2223 textures par forgeage a chaud ou frittes. Pour des pulses de courant , deux comportements sont observes : quand la temperature m
Autor:
D. Bourgault, Jacques G. Noudem, J. Sanchez, Robert Tournier, O. Belmont, Pascal Tixador, J.M. Barbut, M. F. Devismes, L. Porcar
Publikováno v:
European Physical Journal: Applied Physics
European Physical Journal: Applied Physics, EDP Sciences, 1998, 1 (1), pp.7-10. ⟨10.1051/epjap:1998108⟩
European Physical Journal: Applied Physics, EDP Sciences, 1998, 1 (1), pp.7-10. ⟨10.1051/epjap:1998108⟩
Un limiteur de courant supraconducteur pourrait etre utilise en haute tension. La plupart des materiaux a haute temperature critique existants actuels ont ete testes en situation de limitation du courant. Les materiaux massifs sont classes par densit
Autor:
L. Porcar, D. Bourgault, J.M. Barbut, Pascal Tixador, O. Belmont, Jacques G. Noudem, M. Barrault, J. Beille, Robert Tournier
Publikováno v:
Physica C: Superconductivity
Physica C: Superconductivity, North-Holland, 1997, 281 (4), pp.339-344. ⟨10.1016/S0921-4534(97)01480-9⟩
Physica C: Superconductivity, North-Holland, 1997, 281 (4), pp.339-344. ⟨10.1016/S0921-4534(97)01480-9⟩
In this study, the transition of Bi 1.8 Pb 0.4 Sr 2 Ca 2.2 O 10.3+ x ceramics in the form of both textured and sintered bars is investigated at 77 K using high pulsed currents with a duration varying from 1.25 to 20 ms. Two types of behaviour are obs
Autor:
D. Bourgault, E Floch, L. Porcar, O. Belmont, Pascal Tixador, Robert Tournier, Jacques G. Noudem, J.M. Barbut
Publikováno v:
IEEE Transactions on Applied Superconductivity
IEEE Transactions on Applied Superconductivity, Institute of Electrical and Electronics Engineers, 1997, 7 (2), pp.1017-1020. ⟨10.1109/77.614685⟩
IEEE Transactions on Applied Superconductivity, Institute of Electrical and Electronics Engineers, 1997, 7 (2), pp.1017-1020. ⟨10.1109/77.614685⟩
The superconducting (SC) current limiter is one of the most attractive applications of superconductivity because it is an innovative device without any conventional equivalence. Following the emergence of ultra low AC loss NbTi strands in the eightie
Publikováno v:
Journal of Applied Physics. 79:7586-7591
The origin of the cracking of highly porous silicon layers during drying is investigated. Optical and scanning electron microscopy observation allow us to observe the cracking occurrence. In situ x‐ray diffraction experiments, under controlled vapo
Publikováno v:
Thin Solid Films. 276:219-222
The effects of the capillary stresses during the drying of p + -type porous silicon (PS) layers are reported. The cracking of the PS layers occurs for samples thicker than a critical thickness value hc. Taking into account the elastic properties of p
Autor:
C. Fenouillet-Beranger, J. Todeschini, J.C. Le-Denmat, N. Loubet, C. Gallon, P. Perreau, S. Manakli, B. Minghetti, L. Pain, V. Arnal, A. Vandooren, S. Denorme, D. Aime, L. Tosti, C. Savardi, M. Broekaart, P. Gouraud, F. Leverd, V. Dejonghe, P. Brun, M. Guillermet, M. Aminpur, B. Icard, S. Barnola, F. Rouppert, F. Martin, T. Salvetat, S. Lhostis, C. Laviron, N. Auriac, T. Kormann, G. Chabanne, S. Gaillard, F. Boeuf, O. Belmont, E. Laffosse, D. Barge, A. Zauner, A. Tarnowka, K. Romanjec, H. Brut, A. Lagha, S. Bonnetier, F. Joly, J. Coignus, N. Mayet, A. Cathignol, D. Galpin, D. Pop, R. Delsol, R. Pantel, F. Pionnier, G. Thomas, D. Bensahel, S. Deleonibus, O. Faynot, T. Skotnicki, H. Mingam, L. Brevard, C. Buj, C. Soonekindt
Publikováno v:
2007 IEEE International Electron Devices Meeting.
In this paper, we report on FD-SOI with high-k and single metal gate as a possible candidate for the 32 nm LOP and LSTP nodes. Good Ion/Ioff performance for nMOS and pMOS transistors in the ultra-low-leakage regime (Ioff=6.6 pA/μm) are presented. In
Autor:
D. Reber, V.H. Nguyen, E. Mastromatteo, D. Bunel, J. Van Hassel, C. Monget, T. Berger, R. Gonella, C. Verove, C. Cregut, Robert Fox, O. Belmont, E. Sabouret, Alexis Farcy, J.P. Jacquemin, Emmanuel Josse, P. Vannier, J. Mueller, O. Hinsinger, Aurelie Humbert, W. F. A. Besling, Phillip Christie, C. Goldberg, B.G. Sharma, P. Brun
Publikováno v:
IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..
Given the much discussed challenges of interconnect scaling at the 65-nm node, the choice of process architecture is a key determinant of performance and extendibility. An alternate trench-first with hardmask integration is described in this work, in
Autor:
P.O. Sassoulas, Francois Wacquant, J. Todeschini, M. Woo, M. Charpin, Y. Laplanche, N. Revil, J.C. Oberlin, Roland Pantel, B. Hinschberger, O. Belmont, D. Neira, P. Stolk, Franck Arnaud, M. Broekaart, Frederic Boeuf, I. Guilmeau, D. Ceccarelli, Francois Leverd, N. Emonet, Damien Lenoble, Bertrand Borot, G. Imbert, N. Bicais, S. Delmedico, A. Sicard, Nicolas Planes, J. Farkas, Christophe Regnier, V. Vachellerie, J. Uginet, Chittoor Parthasarathy, E. Denis, V. DeJonghe, Pierre Morin, T. Devoivre, H. Brut, R. Palla, Laurent Pain, P. Vannier, F. Salvetti, A. Beverina, C. Perrot
Publikováno v:
2003 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.03CH37407).
This work highlights a 65 nm CMOS technology platform for low power and general-purpose applications. A 6-T SRAM cell size of 0.69 /spl mu/m/sup 2/ with a 45 nm gate length is demonstrated. Electrical data of functional SRAM bit-cell is presented at