Zobrazeno 1 - 10
of 52
pro vyhledávání: '"Noureddine Chabini"'
Publikováno v:
IEEE Access, Vol 11, Pp 64745-64757 (2023)
In this paper, we introduce an accurate, efficient, and optimized design and implementation of a Gaussian pseudo random number generator (PRNG) on a field-programmable gate array (FPGA) platform. A second-order segmented Box-Muller (S2 BM) transforma
Externí odkaz:
https://doaj.org/article/4bad07a7571845d1b560a7df09fd43b8
Autor:
Mountassar Maamoun, Adnane Hassani, Samir Dahmani, Hocine Ait Saadi, Ghania Zerari, Noureddine Chabini, Rachid Beguenane
Publikováno v:
IET Circuits, Devices and Systems, Vol 15, Iss 5, Pp 475-484 (2021)
Abstract This paper proposes an efficient high‐order finite impulse response (FIR) filter structure for field programmable gate array (FPGA)‐based applications with simultaneous digital signal processing (DSP) and look‐up‐table (LUT) reduced
Externí odkaz:
https://doaj.org/article/96244c7e0826458aa29054659b76369f
Publikováno v:
International Journal of Reconfigurable Computing, Vol 2017 (2017)
In this paper, a novel BCD multiplier approach is proposed. The main highlight of the proposed architecture is the generation of the partial products and parallel binary operations based on 2-digit columns. 1 × 1-digit multipliers used for the parti
Externí odkaz:
https://doaj.org/article/978d54807ff54102987727b8458778f5
Publikováno v:
International Journal of Reconfigurable Computing, Vol 2009 (2009)
Externí odkaz:
https://doaj.org/article/4fff03812546496585aa9246c7755928
Autor:
Noureddine Chabini, Rachid Beguenane
Publikováno v:
2023 IEEE 13th Annual Computing and Communication Workshop and Conference (CCWC).
Publikováno v:
2022 IEEE 3rd International Conference on Electronics, Control, Optimization and Computer Science (ICECOCS).
Autor:
Noureddine Chabini, Rachid Beguenane
Publikováno v:
2022 IEEE 13th Annual Information Technology, Electronics and Mobile Communication Conference (IEMCON).
Autor:
Noureddine Chabini, Rachid Beguenane
Publikováno v:
2022 IEEE Canadian Conference on Electrical and Computer Engineering (CCECE).
Autor:
Adnane Hassani, Samir Dahmani, Noureddine Chabini, Hocine Ait Saadi, Ghania Zerari, Mountassar Maamoun, Rachid Beguenane
Publikováno v:
IET Circuits, Devices and Systems, Vol 15, Iss 5, Pp 475-484 (2021)
This paper proposes an efficient high‐order finite impulse response (FIR) filter structure for field programmable gate array (FPGA)‐based applications with simultaneous digital signal processing (DSP) and look‐up‐table (LUT) reduced utilizati
Autor:
Noureddine Chabini, Abdessadek Aaroud
Publikováno v:
2021 IEEE 12th Annual Information Technology, Electronics and Mobile Communication Conference (IEMCON).