Zobrazeno 1 - 10
of 178
pro vyhledávání: '"Noriyuki MIURA"'
Publikováno v:
IEEE Open Journal of Circuits and Systems, Vol 5, Pp 211-223 (2024)
Hyper-Dimensional (HD) computing is a brain-inspired learning approach for efficient and fast learning on today’s embedded devices. HDC first encodes all data points to high-dimensional vectors called hypervectors and then efficiently performs the
Externí odkaz:
https://doaj.org/article/91f45b301e794ddc964ba2a1d0a40a62
Autor:
Haruka Hirata, Daiki Miyahara, Victor Arribas, Yang Li, Noriyuki Miura, Svetla Nikova, Kazuo Sakiyama
Publikováno v:
Transactions on Cryptographic Hardware and Embedded Systems, Vol 2024, Iss 1 (2023)
Deploying cryptography on embedded systems requires security against physical attacks. At CHES 2019, M&M was proposed as a combined countermeasure applying masking against SCAs and information-theoretic MAC tags against FAs. In this paper, we show th
Externí odkaz:
https://doaj.org/article/a74c918c27dc42adac9230dff74f7dc7
Publikováno v:
IEEE Solid-State Circuits Magazine. 15:25-31
Autor:
Noriyuki MIURA
Publikováno v:
IEICE ESS Fundamentals Review. 16:147-155
Publikováno v:
IEICE Transactions on Information and Systems. :1273-1282
Publikováno v:
2023 IEEE International Solid- State Circuits Conference (ISSCC).
Publikováno v:
IEEE Transactions On Very Large Scale Integration (VLSI) Systems. 30(1):5-14
Secure hardware systems are threatened by adversarial attempts on integrated circuit (IC) chips in a practical utilization environment. This article provides overviews of physical attacks on cryptographic circuits, associated vulnerabilities in an IC
Publikováno v:
Proceedings of the 28th Asia and South Pacific Design Automation Conference.
Autor:
Noriyuki Miura
Publikováno v:
2022 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT).
Autor:
Noriyuki Miura, Takaaki Okidono, Naoya Watanabe, Takuji Miki, Katsuya Kikuchi, Haruo Shimamoto, Makoto Nagata, Yuuki Araga, Hiroki Sonoda, Kazuki Monta
Publikováno v:
IEEE Transactions on Electron Devices. 68:2077-2082
3-D stacks of complimentary metal–oxide–semiconductor (CMOS) integrated circuit (IC) chips for security applications monolithically embed backside buried metal (BBM) routing with low series impedance and high decoupling capability in a power deli