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Publikováno v:
IndraStra Global.
As transistor technology scales ever further, hardware reliability is becoming harder to manage. The effects of soft errors, variability, wear-out, and yield are intensifying to the point where it becomes difficult to harness the benefits of deeper s
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=issn23813652::266f09f6062e531752202ba3c087eb0d
http://digital.library.wisc.edu/1793/60704
http://digital.library.wisc.edu/1793/60704
Autor:
Nomura, Shuou, Sinclair, Matthew D., Ho, Chen-Han, Govindaraju, Venkatraman, de Kruijf, Marc, Sankaralingam, Karthikeyan
Publikováno v:
Proceeding of the 38th Annual International Symposium: Computer Architecture; 6/ 4/2011, p201-212, 12p
Publikováno v:
Proceedings of the 37th Annual International Symposium: Computer Architecture; 6/19/2010, p497-508, 12p
Autor:
Fujiyoshi, Toshihide, Shiratake, Shinichiro, Nomura, Shuou, Nishikawa, Tsuyoshi, Kitasho, Yoshiyuki, Arakida, Hideho, Okuda, Yuji, Tsuboi, Yoshiro, Hamada, Mototsugu, Hara, Hiroyuki, Fujita, Tetsuya, Hatori, Fumitoshi, Shimazawa, Takayoshi, Yahagi, Kunihiko, Takeda, Hideki, Murakata, Masami, Minami, Fumihiro, Kawabe, Naoyuki, Kitahara, Takeshi, Seta, Katsuhiro
Publikováno v:
IEEE Journal of Solid-State Circuits; Jan2006, Vol. 41 Issue 1, p54-62, 9p, 1 Black and White Photograph, 8 Diagrams, 1 Chart, 4 Graphs