Zobrazeno 1 - 10
of 119
pro vyhledávání: '"Nobuo Hayasaka"'
Publikováno v:
Elektronik Industrie. 2/20/2020, p5-5. 1p.
Autor:
Davis, Michelle F. (AUTHOR), Baker, Liana (AUTHOR)
Publikováno v:
Bloomberg.com. 1/4/2023, pN.PAG-N.PAG. 1p.
Autor:
K. Muraoka, Hidetoshi Koike, E. Fukuda, S. Hohkibara, Nobuo Hayasaka, Hideshi Miyajima, K. Tomioka, M. Kimura, Fumiyoshi Matsuoka
Publikováno v:
IEEE Transactions on Semiconductor Manufacturing. 11:54-62
We describe equipment and facility operational methods in a production fab which are designed to achieve quick-turnaround-time (QTAT) manufacturing and ease product transfer from development to mass production. An advanced CIM system with precise lot
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6f02502dda5d278cd8c3be7c9cc04467
https://doi.org/10.1109/66.661285
https://doi.org/10.1109/66.661285
Autor:
Keiji Horioka, Y. Akama, Haruo Okano, Nobuo Hayasaka, A. Sakai, S. Nadahara, J. Shiozawa, N. Shooda, Hirotaka Nishino
Publikováno v:
Journal of Applied Physics. 74:1349-1353
Changes in surface morphology have been studied for Si surfaces treated with CF4/O2 down‐flow etching. It has been found that rough Si surfaces can be smoothed and Si trench corners can be rounded off using this CF4/O2 down‐flow etching. A SiFxOy
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f7e7754084e52458e9f71c9be986114f
https://doi.org/10.1063/1.354891
https://doi.org/10.1063/1.354891
Publikováno v:
Journal of Applied Physics. 74:1345-1348
Damage‐free selective etching of Si native oxides against Si has been achieved by NH3/NF3 and SF6/H2O down‐flow etching. In the NH3/NF3 etching, the wafer was covered with a film, and after its removal by heating above 100 °C, only SiO2 was foun
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6d81a31b7bc5163f02699c79e7d71fad
https://doi.org/10.1063/1.354890
https://doi.org/10.1063/1.354890
Autor:
Gaku Minamihaba, Yukiteru Matsui, Yoshikuni Tateyama, Atsushi Shigeta, Hiroyuki Yano, Nobuo Hayasaka, Takeshi Nishioka, K. Takahata
Publikováno v:
Proceedings of the IEEE 2005 International Interconnect Technology Conference, 2005..
In order to reduce the focus error for the stacked mask process (SMAP) used in Cu/low-k dual damascene (DD) interconnect, a planarization technology of the under layer film by CMP was developed. Photo-resist was used for the under layer film. CMP slu
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3d8f2d444b45acbb310cc2537b69f164
https://doi.org/10.1109/iitc.2005.1499963
https://doi.org/10.1109/iitc.2005.1499963
Autor:
Sachiyo Ito, Takashi Yoda, H. Kamijo, M. Inohara, T. Hachiya, K. Akiyama, K. Tabuchi, Hideki Shibata, K. Watanabe, Hideshi Miyajima, K. Higashi, Shingo Kadomura, N. Matsunaga, Hisashi Yano, Akihiro Kajita, Nobuo Hayasaka, Toshiaki Hasegawa, Katsuyuki Fujita, R. Kanamura, T. Shimayama, Y. Enomoto, Rempei Nakata, K. Honda, Naofumi Nakamura
Publikováno v:
IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..
In order to realize highly reliable low-k/Cu interconnects, optimum BEOL structures were developed for 130, 90 and 65 node logic devices respectively. For 65 nm node BEOL structure, the conventional monolithic dual damascene (DD) structure was replac
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b28caa227e5631f359cdcb93781cbf72
https://doi.org/10.1109/iedm.2004.1419147
https://doi.org/10.1109/iedm.2004.1419147