Zobrazeno 1 - 3
of 3
pro vyhledávání: '"Nobuhiro Nonogaki"'
Autor:
Hiroyuki Usui, Nau Ozaki, Hui Xu, Takeshi Kodaka, Takashi Miyamori, Soichiro Hosoda, Kazumasa Yamamoto, Nobuhiro Nonogaki, Jun Tanabe, Toru Sano
Publikováno v:
IEICE Transactions on Electronics. :360-368
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5d23b62decd1deb549409ee8b51db036
https://doi.org/10.1587/transele.e97.c.360
https://doi.org/10.1587/transele.e97.c.360
Autor:
Tatsuya Mori, Yasuyuki Ueda, Nobuhiro Nonogaki, Toshihiro Terazawa, Milosz Sroka, Tetsuya Fujita, Takeshi Kodaka, Takayuki Mori, Kumiko Morita, Hideho Arakida, Takashi Miura, Yuji Okuda, Toshiki Kizu, Yoshiro Tsuboi
Publikováno v:
IEEE Journal of Solid-State Circuits. 44:2957-2965
We have developed an eight-core media processor for mobile multimedia applications, which achieves low power consumption and high performance. The processor uses a specific parallel process execution scheme that achieves high performance and allows p
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c35a038b8414c0faa9a63f5c5f93ddfa
https://doi.org/10.1109/jssc.2009.2028936
https://doi.org/10.1109/jssc.2009.2028936
Autor:
Hiroyuki Usui, Soichiro Hosoda, Takeshi Kodaka, Jun Tanabe, Toru Sano, Hui Xu, Takashi Miyamori, Nobuhiro Nonogaki, Nau Ozaki, Kazumasa Yamamoto
Publikováno v:
VLSIC
A low-power many-core SoC for multimedia applications is implemented in 40nm CMOS technology. Within a 210mm2 die, two 32-core clusters are integrated with dynamically reconfigurable processors, hardware accelerators, 2-channel DDR3 I/Fs, and other p
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0a373ad890fadb6bc3987c7e104c5031
https://doi.org/10.1109/vlsic.2012.6243834
https://doi.org/10.1109/vlsic.2012.6243834