Zobrazeno 1 - 10
of 36
pro vyhledávání: '"Ningde Xie"'
Autor:
Ningde Xie1, Khan, Jawad1
Publikováno v:
Intel Technology Journal. 2013, Vol. 17 Issue 1, p94-101. 8p. 2 Diagrams, 2 Graphs.
Publikováno v:
ACM Transactions on Design Automation of Electronic Systems. 18:1-22
This article presents a cross-layer codesign approach to reduce SSD read response latency. The key is to cohesively exploit the NAND flash memory device write speed vs. raw storage reliability trade-off at the physical layer and runtime data access w
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9c77a574273d319433421564d097a1ac
https://doi.org/10.1145/2489792
https://doi.org/10.1145/2489792
Enabling NAND Flash Memory Use Soft-Decision Error Correction Codes at Minimal Read Latency Overhead
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. 60:2412-2421
With the aggressive technology scaling and use of multi-bit per cell storage, NAND flash memory is subject to continuous degradation of raw storage reliability and demands more and more powerful error correction codes (ECC). This inevitable trend mak
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d1d853238a830e0f0c7d755a66662769
https://doi.org/10.1109/tcsi.2013.2244361
https://doi.org/10.1109/tcsi.2013.2244361
Publikováno v:
IEEE Transactions on Magnetics. 49:4761-4767
With the distinct advantage of retaining conventional head and media, the emerging shingled recording technology improves areal storage density through intentional track overlapping that nevertheless introduces severe intertrack interference (ITI). A
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d5dfcd43f6b9642f5c81470eecf5137e
https://doi.org/10.1109/tmag.2013.2242086
https://doi.org/10.1109/tmag.2013.2242086
Publikováno v:
IEEE Transactions on Computers. 62:1051-1057
Future flash-based solid-state drives (SSDs) must employ increasingly powerful error correction code (ECC) and digital signal processing (DSP) techniques to compensate the negative impact of technology scaling on NAND flash memory device reliability.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::06d722d6634f615111522d10d6859f1b
https://doi.org/10.1109/tc.2012.54
https://doi.org/10.1109/tc.2012.54
Autor:
Qi Wu, Yiran Li, Kalyana Sundaram Venkataraman, Hongbin Sun, Tong Zhang, Nanning Zheng, Ningde Xie
Publikováno v:
Journal of Signal Processing Systems. 73:11-24
This paper studies the feasibility and potential of using planar embedded DRAM (eDRAM), which is completely compatible with CMOS logic process, to improve circuit implementation efficiency of memory-hungry signal processing algorithms. In spite of it
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e0f7c89953684901acb751537159ae15
https://doi.org/10.1007/s11265-012-0724-0
https://doi.org/10.1007/s11265-012-0724-0
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 20:1705-1714
Today and future NAND flash memory will heavily rely on system-level fault-tolerance techniques such as error correction code (ECC) to ensure the overall system storage integrity. Since ECC demands the storage of coding redundancy and hence degrades
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c5a4c2da744947e860a9490f509ff71b
https://doi.org/10.1109/tvlsi.2011.2160747
https://doi.org/10.1109/tvlsi.2011.2160747
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. 58:429-439
As technology continues to scale down, NAND Flash memory has been increasingly relying on error-correction codes (ECCs) to ensure the overall data storage integrity. Although advanced ECCs such as low-density parity-check (LDPC) codes can provide sig
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a9dc759b52ecab103a72c900847d4b74
https://doi.org/10.1109/tcsi.2010.2071990
https://doi.org/10.1109/tcsi.2010.2071990
Publikováno v:
IEEE Transactions on Magnetics. 46:933-941
We report on the use of low-density parity check (LDPC)-centric error correction coding (ECC) for magnetic recording read channel in the presence of significant burst errors. Since an LDPC code by itself is severely vulnerable to burst errors due to
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d766cb9f4f6ddd8c5f6643d91aa317eb
https://doi.org/10.1109/tmag.2009.2034012
https://doi.org/10.1109/tmag.2009.2034012
Publikováno v:
IEEE Transactions on Magnetics. 46:87-91
Although the performance of a magnetic recording read channel can be improved by employing advanced iterative signal detection and coding techniques, the method nevertheless tends to incur significant silicon area and energy consumption overhead. Mot
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::371e7ed510e85cca76df71d683b706b6
https://doi.org/10.1109/tmag.2009.2026898
https://doi.org/10.1109/tmag.2009.2026898