RED-SEA: Network Solution for Exascale Architectures

Autor: Andrea Biagioni, Paolo Cretaro, Ottorino Frezza, Francesca Lo Cicero, Alessandro Lonardo, Michele Martinelli, Pier Stanislao Paolucci, Elena Pastorelli, Francesco Simula, Matteo Turisini, Piero Vicini, Roberto Ammendola, Pascale Bernier-Bruna, Claire Chen, Said Derradji, Stephane Guez, Pierre-Axel Lagadec, Gregoire Pichon, Etienne Walter, Gaetan De Gassowski, Matthieu Hautreaux, Stephane Mathieu, Gilles Moreau, Marc Perache, Hugo Taboada, Torsten Hoefler, Timo Schneider, Matteo Barnaba, Giuseppe Piero Brandino, Francesco De Giorgi, Matteo Poggi, Iakovos Mavroidis, Yannis Papaefstathiou, Nikolaos Tampouratzis, Benjamin Kalisch, Ulrich Krackhardt, Mondrian Nuessle, Pantelis Xirouchakis, Vangelis Mageiropoulos, Michalis Gianioudis, Harisis Loukas, Aggelos Ioannou, Nikos Kallimanis, Nikos Chrysos, Manolis Katevenis, Wolfang Frings, Dominik Gottwald, Felime Guimaraes, Max Holicki, Volker Marx, Yannik Muller, Carsten Clauss, Hugo Falter, Xu Huang, Jennifer Lopez Barillao, Thomas Moschny, Simon Pickartz, Francisco J. Alfaro, Jesus Escudero-Sahuquillo, Pedro Javier Garcia, Francisco J. Quiles, Jose L. Sanchez, Adrian Castello, Jose Duro, Maria Engracia Gomez, Enrique Quintana, Julio Sahuquillo, Eugenio Stabile

Publikováno v: 2022 25th Euromicro Conference on Digital System Design (DSD)

In order to enable Exascale computing, next generation interconnection networks must scale to hundreds of thousands of nodes, and must provide features to also allow the HPC, HPDA, and AI applications to reach Exascale, while benefiting from new hard

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::180f713f306e6611b046d052542a4cac
https://hdl.handle.net/20.500.11850/605842

PART: Pinning Avoidance in RDMA Technologies

Autor: Manolis Katevenis, Vassilis Papaefstathiou, Antonis Psistakis, Nikos Chrysos, Michalis Giannioudis, Pantelis Xirouchakis, Fabien Chaix, Marios Asiminakis

Publikováno v: NOCS

State-of-the-art Remote Direct Memory Access (RDMA) engines pin communication buffers, complicating the programming model, limiting the memory utilization, and mandating a separate memory translation subsystem spanning the network interface card and

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::13f24aee886d33e1f9bba80cbb59d65b
https://doi.org/10.1109/nocs50636.2020.9241587

Low latency RDMA for High Performance Computing on ARM platforms

Autor: Pantelis Xirouchakis, Panagiotis Peristerakis, Michalis Gianioudis, Antonis Psistakis, Giorgos Kalokairinos, Nikos Chrysos, Vassilis Papaefstathiou, Manolis G.H. Katevenis

In HPC, low latency communication between remote processes is crucial to application performance. InfiniBand networks can reduce the latency but require special and costly network interface cards, which are loosely coupled with CPU, thus needing to c

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::384f6b92c943b3d8e422505e067e71a7

Low latency network and distributed storage for next generation HPC systems:The ExaNeSt project

Autor: Nikos Chrysos, Alessandro Lonardo, Paolo Cretaro, Ottorino Frezza, Elena Pastorelli, Manolis Katevenis, Pierluigi Paolucci, Javier Navaridas, V. Papaeustathiou, Piero Vicini, Michele Martinelli, Andrea Biagioni, F. Lo Cicero, F. Simula, F. Pisani, Roberto Ammendola, Fabien Chaix

Publikováno v: Ammendola, R, Biagioni, A, Cretaro, P, Frezza, O, Lo Cicero, F, Lonardo, A, Martinelli, M, Paolucci, P S, Pastorelli, E, Pisani, F, Simula, F, Vicini, P, Navaridas, J, Chaix, F, Chrysos, N, Katevenis, M & Papaeustathiou, V 2017, ' Low latency network and distributed storage for next generation HPC systems : The ExaNeSt project ', Journal of Physics: Conference Series, vol. 898, no. 8, 082045 . https://doi.org/10.1088/1742-6596/898/8/082045
Journal of Physics: Conference Series

With processor architecture evolution, the HPC market has undergone a paradigm shift. The adoption of low-cost, Linux-based clusters extended the reach of HPC from its roots in modelling and simulation of complex physical systems to a broader range o

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::6e14528f9ef103996a42751e9ce7b614
https://doi.org/10.1088/1742-6596/898/8/082045

Throughput of random arbitration for approximate matchings

Autor: Nikos Chrysos, Lydia Y. Chen

Publikováno v: ANCS

Modern switches and switching fabrics typically employ virtual output queues (VOQs) at network adapters, in order to mitigate head-of-line blocking. The core of the switch, often a crossbar, can either be bufferless or buffered. Previous research on

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::ed670359e0f833f8ec0940e10b92a682
https://doi.org/10.1145/1872007.1872026