Zobrazeno 1 - 2
of 2
pro vyhledávání: '"Nicolas Morey Chaisemartin"'
Autor:
Benoit Ganne, Patrice Couvert, Renaud Ayrignac, Benoît Dupont de Dinechin, Samuel Jones, Frederic Riss, Thierry Strudel, Nicolas Morey Chaisemartin, Francois Jacquet, Pierre Guironnet de Massas, Pierre-Edouard Beaucamps
Publikováno v:
HPEC
The Kalray MPPA-256 processor integrates 256 user cores and 32 system cores on a chip with 28nm CMOS technology. Each core implements a 32-bit 5-issue VLIW architecture. These cores are distributed across 16 compute clusters of 16+1 cores, and 4 quad
Extended Cyclostatic Dataflow Program Compilation and Execution for an Integrated Manycore Processor
Autor:
Samuel Jones, Bruno Bodin, Francois Galea, Thierry Goubier, Loïc Cudennec, Pascal Aubry, Michel Harrand, Vincent David, Sergiu Carpov, Jean-Denis Lesage, Stéphane Louise, Paul Dubrulle, Frédéric Blanc, Philippe Dore, Pierre-Edouard Beaucamps, Benoît Dupont de Dinechin, Nicolas Morey Chaisemartin, Thanh Hai Nguyen, Xavier Raynaud, Renaud Sirdey
Publikováno v:
ICCS
Alchemy 2013-Architecture, Languages, Compilation and Hardware support for Emerging ManYcore systems
Alchemy 2013-Architecture, Languages, Compilation and Hardware support for Emerging ManYcore systems, Jun 2013, Barcelona, Spain. pp.1624-1633, ⟨10.1016/j.procs.2013.05.330⟩
Procedia Computer Science
Alchemy 2013-Architecture, Languages, Compilation and Hardware support for Emerging ManYcore systems
Alchemy 2013-Architecture, Languages, Compilation and Hardware support for Emerging ManYcore systems, Jun 2013, Barcelona, Spain. pp.1624-1633, ⟨10.1016/j.procs.2013.05.330⟩
Procedia Computer Science
International audience; The ever-growing number of cores in embedded chips emphasizes more than ever the complexity inherent to parallel programming. To solve these programmability issues, there is a renewed interest in the dataflow paradigm. In this