Zobrazeno 1 - 10
of 17
pro vyhledávání: '"Ni Yabo"'
Autor:
Fu, Cong, Wang, Kun, Wu, Jiahua, Chen, Yizhou, Huzhang, Guangda, Ni, Yabo, Zeng, Anxiang, Zhou, Zhiming
Modern e-commerce platforms rely heavily on modeling diverse user feedback to provide personalized services. Consequently, multi-task learning has become an integral part of their ranking systems. However, existing multi-task learning methods encount
Externí odkaz:
http://arxiv.org/abs/2411.09705
Autor:
Chen, Yizhou, Huzhang, Guangda, Zeng, Anxiang, Yu, Qingtao, Sun, Hui, Li, Heng-yi, Li, Jingyi, Ni, Yabo, Yu, Han, Zhou, Zhiming
In recent years, recommender systems have advanced rapidly, where embedding learning for users and items plays a critical role. A standard method learns a unique embedding vector for each user and item. However, such a method has two important limita
Externí odkaz:
http://arxiv.org/abs/2302.01478
Quantitative assessment of rotator cuff injuries using synthetic MRI and IDEAL-IQ imaging techniques
Publikováno v:
In Heliyon 15 September 2024 10(17)
Recommender systems (RSs) are essential for e-commerce platforms to help meet the enormous needs of users. How to capture user interests and make accurate recommendations for users in heterogeneous e-commerce scenarios is still a continuous research
Externí odkaz:
http://arxiv.org/abs/2012.08952
Perceive Your Users in Depth: Learning Universal User Representations from Multiple E-commerce Tasks
Tasks such as search and recommendation have become increas- ingly important for E-commerce to deal with the information over- load problem. To meet the diverse needs of di erent users, person- alization plays an important role. In many large portals
Externí odkaz:
http://arxiv.org/abs/1805.10727
Publikováno v:
2020 IEEE 14th International Conference on Anti-counterfeiting, Security, and Identification (ASID).
A high linearity input buffer is critical for a high speed high-resolution analog-to-digital converter (ADC), especially for IF/RF sampling applications. In this paper, a wide-band input buffer with optimized linearity for high-speed high-resolution
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::29fbd9abb9495d01546020568664e541
https://doi.org/10.1109/asid50160.2020.9271786
https://doi.org/10.1109/asid50160.2020.9271786
Publikováno v:
2019 IEEE 13th International Conference on Anti-counterfeiting, Security, and Identification (ASID).
An ultra-fast and low-cost testing and calibration method for successive approximation register (SAR) analog-to-digital converter (ADC) is proposed. The ADC nonlinearities are modeled as segmented parameters with inter-segment mismatch errors. During
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1c0d5554f8582c8cdec7ea1864f25ad1
https://doi.org/10.1109/icasid.2019.8925271
https://doi.org/10.1109/icasid.2019.8925271
Publikováno v:
2018 12th IEEE International Conference on Anti-counterfeiting, Security, and Identification (ASID).
A LMS (Least Mean Square) based SNR and SFDR boost algorithm used in high resolution A/D converters is presented in this paper. By using the algorithm, not only the converting nonlinearity caused by bit weight mismatch, but also the sampling nonlinea
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f237394cdc46aff5e952e71b659dd524
https://doi.org/10.1109/icasid.2018.8693207
https://doi.org/10.1109/icasid.2018.8693207
Publikováno v:
2018 IEEE 18th International Conference on Communication Technology (ICCT).
A fully integrated reference buffer with high-efficiency for high-speed and high-precision Switched-capacitor ADCs is presented. To reduce hardware and power comsumption, the slow feedback loop and reference generation circuit are combined. And an im
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::be2ce57af71461f554bcafb296c2f981
https://doi.org/10.1109/icct.2018.8599906
https://doi.org/10.1109/icct.2018.8599906
Publikováno v:
2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).
Generally, a dynamic latch comparator may include two inverters configured back to back to latch the result of comparison. One of the major factors affecting its speed is the power supply voltage, because the maximal Vgs (gate-source voltage) of MOS
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c72e61b4aa69d0f8bae4f3394608382a
https://doi.org/10.1109/icsict.2018.8565749
https://doi.org/10.1109/icsict.2018.8565749