Zobrazeno 1 - 7
of 7
pro vyhledávání: '"Nene Kushita"'
Publikováno v:
Advanced Engineering Forum. 38:192-205
This paper proposes a method to design a flat pass-band gain with two RC band-stop filters for a 4-stage passive RC polyphase filter in a Bluetooth receiver. Based on the superposition principle, the transfer function of the poplyphase filter is deri
Autor:
Anna Kuwana, Akemi Hatta, Nene Kushita, Minh Tri Tran, Koji Asami, Haruo Kobayashi, Yoshiro Tamura
Publikováno v:
ASICON
RC polyphase filter is a complex analog filter and has asymmetric frequency characteristics with respect to DC. It is composed of resistors and capacitors, and has complex analog input / output ports. Since this type of filter can partially realize H
Publikováno v:
ASICON
This paper proposes a flat pass-band for a 4-stage passive RC polyphase filter in a blue-tooth low-IF receiver system; there the bandwidth is 8MHz, the center IF frequency is 4MHz, and the required image rejection ratio is
Publikováno v:
ASICON
This paper describes the research history of the authors' group in the area of analog/mixed-signal circuits for complex or quadrature signal processing. Here the complex signal is composed of In-phase and Quadrature-phase signals (I, Q signals); the
Autor:
Tamotsu Ichikawa, Keno Sato, Hirotaka Arai, Haruo Kobayashi, Anna Kuwana, Takashi Ishida, Toshiyuki Okamoto, Jianglin Wei, Takayuki Nakatani, Takahiko Shimizu, Nene Kushita, Kazumi Hatayama, Yuji Gendai, Yusuke Asada
Publikováno v:
VTS
The IP session highlights three innovative test practices in Japan, which include DC parametric test time reduction using digital controlled DC resource and deep reconsideration for ADC distortion testing as well as test time reduction of low samplin
Autor:
Hiromichi Harakawa, Yukiko Shibasaki, Nene Kushita, Takeshi Oikawa, Haruo Kobayashi, Takashi Ida, Mayu Hirano, Nobukazu Tsukiji, Yoichi Moroshima
Publikováno v:
2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).
This paper describes silicon verification of our improved peaking current mirror, originally invented by Nagata Minoru in 1966. Our improved MOS current mirror circuits are insensitive to wide range of power supply voltage variation and they are real
Autor:
Jun-ya Kojima, Jianlong Wang, Jiang-Lin Wei, Yuanyang Du, Nene Kushita, Haruo Kobayashi, Masahiro Murakami
Publikováno v:
2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).
This paper reviews the authors’ group research results of data-weighted averaging (DWA) algorithm for multi-bit ΔΣADC/DAC/TDC and also dithering techniques for ΔΣ ADC/DAC for limit cycle reduction. When a multi-bit internal DAC or digital-to-ti