Zobrazeno 1 - 4
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pro vyhledávání: '"Neil Bryan Henis"'
Publikováno v:
SPIE Proceedings.
We report here on process integration issues in the interconnect module of advanced microprocessor. We show how stresses in certain layers can affect yield and result in novel failure mechanisms in other layers. The paper will follow the history of a
Publikováno v:
SPIE Proceedings.
Shadowing of lightly doped drain (LDD) implants at the gate edge can cause shifts in effective electrical channel length (Leff), drive current (Ids) and transistor asymmetry. Process integration of gate etch and LDD implant processing and equipment i
Publikováno v:
SPIE Proceedings.
As integrate circuit geometries, capital for defect detection equipment, and process cycle time decrease simultaneously, prioritizing continuous yield improvement activities becomes essential. One approach for achieving this goal is to integrate yiel
Publikováno v:
SPIE Proceedings.
One of the major sources of particles today is from processing equipment. As die size continues to shrink, more effort needs to be placed in defect detection and elimination. A defect of 1 - 2 microns in size, while barely noticeable 5 years ago, can