Zobrazeno 1 - 10
of 87
pro vyhledávání: '"Naveed A. Sherwani"'
Autor:
Naveed A. Sherwani
Algorithms for VLSI Physical Design Automation is a core reference text for graduate students and CAD professionals. It provides a comprehensive treatment of the principles and algorithms of VLSI physical design. Algorithms for VLSI Physical Design A
Publikováno v:
Czechoslovak Mathematical Journal. 50:35-46
A graph $G$ is stratified if its vertex set is partitioned into classes, called strata. If there are $k$ strata, then $G$ is $k$-stratified. These graphs were introduced to study problems in VLSI design. The strata in a stratified graph are also refe
Autor:
Naveed A. Sherwani, Dinesh P. Mehta
Publikováno v:
ACM Transactions on Design Automation of Electronic Systems. 5:82-97
This paper presents three minimum-area floorplanning algorithms that use flexible arbitrary rectilinear shapes for the standard cell regions in MBC design. The first algorithm (pure HCST) introduces a grid traversal technique which guarantees a minim
Autor:
Naveed A. Sherwani
Algorithms for VLSI Physical Design Automation, Second Edition is a core reference text for graduate students and CAD professionals. Based on the very successful First Edition, it provides a comprehensive treatment of the principles and algorithms of
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 15:1365-1378
In this paper, we consider the two row maximum planar subset (TRMPS) problem in over-the-cell routing. The TRMPS problem requires selection of the maximum planar subset of nets, which can be routed between two rows of terminals in a cell row. This pr
Publikováno v:
The Journal of Supercomputing. 8:263-294
The hypercube, though a popular and versatile architecture, has a major drawback in that its size must be a power of two. In order to alleviate this drawback, Katseff [1988] defined theincomplete hypercube, which allows a hypercube-like architecture
Publikováno v:
Information Processing Letters. 48:221-228
It has been shown, recently, that resource allocation problems in parallel processing systems can be viewed as edge domination problems in graphs. Other applications of edge domination include encoding theory and network routing problems. While the e
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 1:462-472
A new class of cell models called middle terminal models (MTM) is introduced. MTM-based cells allow flexibility in the selection of terminal locations and therefore utilize the over-the-cell (OTC) area more efficiently, as compared to cells based on
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 12:780-792
The WISER algorithm for over-the-cell channel routing in the standard cell design style using the two-layer routing model is presented. The novelty of this approach lies in the use of vacant terminals for over-the-cell routing. Longest paths in the v
Autor:
Naveed A. Sherwani, S. Burman
Publikováno v:
IEEE Micro. 13:28-35
Programmable multichip modules (PMCMs), in which fabricated generic substrates are customized to meet the application-specific needs of a user, are discussed. The design principles of PMCMs are reviewed. The methods for programming fully programmable