Zobrazeno 1 - 10
of 15
pro vyhledávání: '"Nathapong Suthiwongsunthorn"'
Publikováno v:
2017 IEEE 19th Electronics Packaging Technology Conference (EPTC).
Integrated circuit (IC) packages nowadays are becoming more robust and getting smaller. Product manufacturers are moving towards to a smaller body size as it can be easily fit into their specifications but a package that has a smaller body size has i
Autor:
T. Jun Dimaano Panumard, Saravuth Sirinorakul, Kyaw Ko Lwin, Carolyn Epino Tubillo, Nathapong Suthiwongsunthorn
Publikováno v:
2016 IEEE 18th Electronics Packaging Technology Conference (EPTC).
Copper clip package plays a critical role in meeting the increasing requirement for lower total device resistance RDS(on), higher power density and high frequency switching applications. The copper clips replaced traditional wirebond interconnect for
Autor:
Teck Wah Park, Siew Hoon Ore, Daniel Teh, Kian Yeow Gan, Nathapong Suthiwongsunthorn, Yong Bo Yang, Drake Koh, Michael Gantalao Ti In, Surasit Chungpaiboonpatana, Geraldine Ng, Boon Pek Liew, Jonathan Tamil
Publikováno v:
International Symposium on Microelectronics. 2011:000673-000682
Moldability is a crucial aspect of flip chip technology. It is an increasing challenge to ensure moldability with rapid advances in flip chip technology such as decreasing bump pitch and stand-off height, especially when commercial molded underfill (
Autor:
Daniel Studzinski, Ulli Hansen, Kwong-Loon Yam, Kok-Kheong Looi, Dzafir Shariff, Ralph Wilke, Juergen Leib, Volker Seidemann, Ha-Duong Ngo, Kenneth Tan, Florian Bieck, Nathapong Suthiwongsunthorn, Michael Topper
Publikováno v:
IEEE Transactions on Advanced Packaging. 33:713-721
Through-silicon-via (TSV) interconnects using the "via-last" approach are successfully applied for wafer-level packaging of complementary metal-oxide-semiconductor (CMOS) image sensors. Standard materials and processes are applied for redistribution
Autor:
Kyaw Ko Lwin, Carolyn Epino Tubillo, Ang Choon Ghee Jim Dimaano, Saravuth Sirinorakul, Daniel Ting Lee Teh, Gu Bin, Nathapong Suthiwongsunthorn
Publikováno v:
2014 IEEE 16th Electronics Packaging Technology Conference (EPTC).
The increasing demand and requirements for package with smaller footprint, higher dense I/O counts and better performance at lower cost are one of the key challenges faced by semiconductor manufacturing companies. As one of the strategies for sustain
Autor:
Richen Chen, Seow Fui Shi, Jun Dimaano, Choon Ghee Ang, Eric Bool, Gu Bin, Nathapong Suthiwongsunthorn
Publikováno v:
2014 IEEE 16th Electronics Packaging Technology Conference (EPTC).
The package warpage induced by residual stresses during molding process is one of the major thermo-mechanical reliability concerns in IC packaging. This paper proposes a method to find solution to unit warpage control with universal die thickness tha
Autor:
John D. Beleran, Nathapong Suthiwongsunthorn, Ninoy Milanes, Chan Kai Chong, Ranjan Rajoo, Gaurav Mehta
Publikováno v:
2014 IEEE 64th Electronic Components and Technology Conference (ECTC).
The use of copper wire in IC packaging has been growing steadily driven by cost effectiveness. However, there are concerns and issues that prevent or delay copper wire bonding technology qualification. Copper wire inherent hardness properties induces
Publikováno v:
2012 IEEE 14th Electronics Packaging Technology Conference (EPTC).
In this paper we presented methods of optimizing a 17×17mm LFBGA package having improve its electrical performance using an electromagnetic-field software through simulation, particularly on controlled signals (single-end & differential pairs) and h
Autor:
Kian Yeow Gan, Jonathan Tamil, Surasit Chungpaiboonpatana, Siew Hoon Ore, Nathapong Suthiwongsunthorn
Publikováno v:
2011 IEEE 13th Electronics Packaging Technology Conference.
We have developed solutions for the quick assessment of the D2-FBGA thermal performance to meet the rising demands for shorter cycle times to provide thermal solutions. D2-FBGA package has multiple devices packaged within the same footprint which can
Publikováno v:
2010 12th Electronics Packaging Technology Conference.
Technological advances driven by the DRAM market demands resulted in thermal challenges arising from increasing power and decreasing space for cooling. This is exacerbated by the packaging of multiple devices within the same footprint based on die st