Zobrazeno 1 - 10
of 17
pro vyhledávání: '"Nathan Narevsky"'
Autor:
Sijun Du, Nathan Narevsky, Colin Schmidt, Eric Chang, Elad Alon, John Wright, Ayan Biwas, Zhongkai Wang, Zhaokai Liu, Borivoje Nikolic, Minsoo Choi, Wooham Bae
Publikováno v:
DAC
We present a bang-bang phase-locked loop (PLL) generator that encapsulates design methodologies for its circuit blocks and the complete PLL system. The generator is fully automated and parameterized, producing the layout and schematic based on proces
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f3d63fb048e5af7b3e0fc9171508bc95
https://doi.org/10.1109/dac18074.2021.9586318
https://doi.org/10.1109/dac18074.2021.9586318
Autor:
Jonathan Bachrach, Wen Hau Ma, Franco DeSeta, Elad Alon, Daniel R. Fuhrman, Paul Rigge, Nathan Narevsky, Joseph Cole, Justin Norsworthy, Steven Bailey, Borivoje Nikolic, Matthew Doerflein, Adam Izraelevitz, Steve Shauck, Jim McGrath, Brian Richards, Sergio Montano, Woorham Bae, Chick Markley, Akalu Lentiro, Ronen Shoham, Angie Wang, Mark A. Snowden, Zhongkai Wang, Howard Mao, Munir Razzaque, Richard Lin, Mike Stellfox, Darin Heckendorn, Jaeduk Han, Eric Y. Chang
Publikováno v:
IEEE Journal of Solid-State Circuits. 54:2786-2801
This paper demonstrates a signal analysis system-on-chip (SoC) consisting of a general-purpose RISC-V core with vector extensions and a fixed-function signal-processing accelerator. Both the application core and the accelerators are design instances
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e62696f94ee7d77c94e95344e4100ec3
https://doi.org/10.1109/jssc.2019.2924090
https://doi.org/10.1109/jssc.2019.2924090
Autor:
Shuhei Yamada, Saeid Daneshgar, Shinwon Kang, Chintan Thakkar, Bryan K. Casper, Anandaroop Chakrabarti, Nathan Narevsky, Debabani Choudhury, James E. Jaussi, Kaushik Dasgupta
Publikováno v:
IEEE Journal of Solid-State Circuits. 53:3613-3627
Polarization (pol) selectivity has been widely adopted in modern RF transceivers to enable the channel diversity. This paper utilizes orthogonal pol modes to support simultaneous independent data streams on the same frequency channel, thereby doublin
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::18bb9bf966faf68f34b31f8687826029
https://doi.org/10.1109/jssc.2018.2876473
https://doi.org/10.1109/jssc.2018.2876473
Autor:
Antonio Puglielli, Zhongkai Wang, Borivoje Nikolic, Ali M. Niknejad, Gregory Lacaille, Konstantin Trotskovsky, Gregory Wright, Pengpeng Lu, Nathan Narevsky, Amy Whitcombe, Elad Alon
Publikováno v:
IEEE Solid-State Circuits Letters. 1:38-41
To be cost-effective and energy-efficient, massive multiple-input multiple-output (MIMO) arrays must be constructed from radio elements with low power and high linearity, but can tolerate higher noise than conventional stand-alone radios. This letter
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::66a43c28f17c65af065d03eab33b8e67
https://doi.org/10.1109/lssc.2018.2813010
https://doi.org/10.1109/lssc.2018.2813010
Publikováno v:
ESSCIRC
This paper presents a 28nm CMOS 1-20Gb/s energy proportional transmitter with 2-tap DDR SC FFE, 64:2 1-latch MUX serialization, rapid-on/off LC OSC, and adjustable clock divider. Switched Capacitor frontend allows for fully dynamic operation for mini
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::646d09b8ff0131cc552832c3ab80cdc2
https://doi.org/10.1109/esscirc.2019.8902684
https://doi.org/10.1109/esscirc.2019.8902684
Autor:
Elad Alon, Zhongkai Wang, Woorham Bae, Nathan Narevsky, Jaeduk Han, Borivoje Nikolic, Eric Chang
Publikováno v:
CICC
We present BAG2, a framework for the development of process-portable Analog and Mixed Signal (AMS) circuit generators. Such generators are parametrized design procedures that produce schematics, layouts, and verification testbenches for a circuit giv
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4d7f8d2981b275f1c246b146395f95f7
https://doi.org/10.1109/cicc.2019.8780349
https://doi.org/10.1109/cicc.2019.8780349
Autor:
Elad Alon, Borivoje Nikolic, Konstantin Trotskovsky, Vladimir Milovanovic, Thomas A. Courtade, Amy Whitcombe, Antonio Puglielli, Greg LaCaille, Andrew Townley, Gregory Wright, Ali M. Niknejad, Pengpeng Lu, Nathan Narevsky
Publikováno v:
Proceedings of the IEEE. 104:586-606
Large arrays of radios have been exploited for beamforming and null steering in both radar and communication applications, but cost and form factor limitations have precluded their use in commercial systems. This paper discusses how to build arrays t
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3b71e4842d3dd6d717ff6617dad56cde
https://doi.org/10.1109/jproc.2015.2492539
https://doi.org/10.1109/jproc.2015.2492539
Autor:
Jim McGrath, Richard Lin, Darin Heckendorn, Eric Chang, Jaeduk Han, Brian Richards, Franco DeSeta, Ronen Shoham, Justin Norsworthy, Elad Alon, Borivoje Nikolic, Steve Shauck, Zhongkai Wang, Mark A. Snowden, Dan Fuhrman, Munir Razzaque, Jonathan Bachrach, Chick Markley, Matthew Doerflein, Woorham Bae, Stevo Bailey, Howard Mao, Nathan Narevsky, Paul Rigge, Joseph Cole, Wen Hau Ma, Sergio Montano, Mike Stellfox, Angie Wang, Akalu Lentiro, Adam Izraelevitz
Publikováno v:
A-SSCC
This paper demonstrates a signal analysis SoC consisting of a general-purpose RISC-V core with vector extensions and a fixed-function signal-processing accelerator. Both the core and the accelerators are instances produced by novel generators that al
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9ef7c5c3d39448e42699514b21b61f0c
https://doi.org/10.1109/asscc.2018.8579326
https://doi.org/10.1109/asscc.2018.8579326
Publikováno v:
VLSI Circuits
In this letter, we present the design methodology embedded within a SerDes frontend generator along with experimental results from an instance produced in TSMC 16 nm. A generator is an automated, parameterized design procedure that produces schematic
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::a915adadf898fee8932724b501e311ad
https://doi.org/10.1109/vlsic.2018.8502313
https://doi.org/10.1109/vlsic.2018.8502313
Autor:
Eric Chang, Jaeduk Han, Woorham Bae, Zhongkai Wang, Nathan Narevsky, Borivoje NikoliC, Elad Alon
Publikováno v:
2018 IEEE Custom Integrated Circuits Conference (CICC).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8d41c1c14420105f23f04820544fdef4
https://doi.org/10.1109/cicc.2018.8357061
https://doi.org/10.1109/cicc.2018.8357061