Zobrazeno 1 - 10
of 27
pro vyhledávání: '"Naseef Mansoor"'
Autor:
Thomas Mountford, Abhijitt Dhavlle, Andrew Tevebaugh, Naseef Mansoor, Sai Manoj Pudukotai Dinakarrao, Amlan Ganguly
Publikováno v:
Journal of Low Power Electronics and Applications, Vol 13, Iss 3, p 50 (2023)
In modern computing, which relies on the interconnection of networks used in many/multi-core systems, any system can be critically subverted if the interconnection is compromised. This can be done in a multitude of ways, but the threat of a hardware
Externí odkaz:
https://doaj.org/article/c8b293d79cd0413795e34b707e0fb22d
Autor:
Amlan Ganguly, M. Meraj Ahmed, Rounak Singh Narde, Abhishek Vashist, Md Shahriar Shamim, Naseef Mansoor, Tanmay Shinde, Suryanarayanan Subramaniam, Sagar Saxena, Jayanti Venkataraman, Mark Indovina
Publikováno v:
Journal of Low Power Electronics and Applications, Vol 8, Iss 1, p 5 (2018)
With aggressive scaling of device geometries, density of manufacturing faults is expected to increase. Therefore, yield of complex Multi-Processor Systems-on-Chips (MP-SoCs) will decrease due to higher probability of manufacturing defects especially,
Externí odkaz:
https://doaj.org/article/3fd976ca928a47e2b1c8453a6b08bab9
Publikováno v:
IEEE Transactions on Emerging Topics in Computing. 10:324-338
Publikováno v:
Journal of Parallel and Distributed Computing. 139:148-160
Computing platforms ranging from embedded systems to server blades comprise of multiple Systems-on-Chips (SoCs). Conventionally, communication between chips in these multichip platforms are realized using high-speed I/O modules over metal traces on a
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. :1-1
Autor:
Sai Manoj Pudukotai Dinakarrao, M Meraj Ahmed, Amlan Ganguly, Kanad Basu, Naseef Mansoor, Abhijitt Dhavlle
Publikováno v:
ISCAS
Interconnection networks such as Network-on-Chips (NoCs) for multi/many-core processors are critical infrastructure of the system as they enable data communication among the processing cores, caches, memory, and other peripherals. Given the criticali
Autor:
Kanad Basu, Purab Ranjan Sutradhar, Abhijitt Dhavlle, Amlan Ganguly, Naseef Mansoor, Sai Manoj Pudukotai Dinakarrao, M Meraj Ahmed
Publikováno v:
AsianHOST
Interconnection networks for multi/many-core processors or server systems are the backbone of the system as they enable data communication among the processing cores, caches, memory and other peripherals. Given the criticality of the interconnects, t
Autor:
Vignesh Kothandapani, Naseef Mansoor, Rounak Singh Narde, Shahriar Shamim, Jayanti Venkataraman, Amlan Ganguly
Publikováno v:
IEEE Transactions on Computers. 66:389-402
Computing modules in typical datacenter nodes or server racks consist of several multicore chips either on a board or in a System-in-Package (SiP) environment. State-of-the-art inter-chip communication over wireline channels require data signals to t
Publikováno v:
Sustainable Computing: Informatics and Systems. 26:100379
High Performance Computing (HPC) platforms like blade servers consist of multiple processor chips, which may be multicore CPUs, GPUs, memory modules and other subsystems. In such memory and computation intensive systems one-to-many traffic patterns o
Publikováno v:
IGSC
High Performance Computing (HPC) platforms like blade servers consist of multiple processor chips which may be multicore CPUs, GPUs, memory modules and other subsystems. These high performance and memory intensive multichip systems require efficient