Zobrazeno 1 - 10
of 72
pro vyhledávání: '"Naoki Nagashima"'
Autor:
Naoki Nagashima, Yuji Sano
Publikováno v:
2022 IEEE 11th Global Conference on Consumer Electronics (GCCE).
Autor:
Naoki Nagashima, Yuji Sano
Publikováno v:
Proceedings of the International Display Workshops. :482
Autor:
Naoki Nagashima1, Yoshie Nagashima2
Publikováno v:
American Journal of Management. 2018, Vol. 18 Issue 4, p89-103. 15p.
Autor:
Yoshie Nagashima, Naoki Nagashima
Publikováno v:
Advances in Economics and Business. 5:246-255
Publikováno v:
Journal of Marketing Development & Competitiveness. 2015, Vol. 9 Issue 1, p115-128. 14p.
Autor:
Seiji Shindo, Naoki Nagashima
Publikováno v:
Japanese Journal of Administrative Science. 26:97-113
Publikováno v:
IEEE Transactions on Electron Devices. 58:1468-1475
Progressive breakdown (PBD), which is now considered a key feature in the breakdown of ultrathin gate oxides, was investigated to help develop a reliable time-dependent-dielectric-breakdown qualification. In particular, this paper focused on treating
Autor:
Munehisa Takei, Atsushi Ogura, Naoki Nagashima, Kohki Nagata, Amari Koichi, Masanori Tsukamoto, Y. Tateshita, Satoru Mayuzumi, Shinya Yamakawa, Daisuke Kosemura, Hitoshi Wakabayashi, Hiroaki Akamatsu, Terukazu Ohno
Publikováno v:
IEEE Transactions on Electron Devices. 57:1295-1300
An experimental study of mobility and velocity enhancement effects is reported for highly strained short-channel p-channel field-effect transistors (pFETs) using a damascene-gate process on Si (100) and (110) substrates. The relationship between the
Autor:
Satoru Mayuzumi, Y. Tateshita, T. Ohno, Masanori Tsukamoto, Daisuke Kosemura, Hitoshi Wakabayashi, Shinya Yamakawa, Munehisa Takei, Naoki Nagashima, Atsushi Ogura
Publikováno v:
IEEE Transactions on Electron Devices. 56:2778-2784
A damascene-gate process enhances the drivability in the shorter gate length region, as compared to a conventional gate-first process for pFETs with compressive stress SiN liners and embedded source/drain SiGe. The origin of the gate length effect fo
Autor:
Y. Tateshita, T. Hirano, Naoki Nagashima, Hitoshi Wakabayashi, Kaori Tai, Satoru Mayuzumi, Masanori Tsukamoto, Masashi Nakata, S. Yamaguchi, Shinya Yamakawa
Publikováno v:
IEEE Transactions on Electron Devices. 56:620-626
Newly proposed mobility-booster technologies are demonstrated for metal/high-k gate-stack n- and pMOSFETs. The process combination of top-cut SiN dual stress liners and damascene gates remarkably enhances local channel stress particularly for shorter