Zobrazeno 1 - 10
of 102
pro vyhledávání: '"Naoki Kasai"'
Autor:
Tadahiko Sugibayashi, Shunsuke Fukami, Keizo Kinoshita, Sadahiko Miura, Hiroaki Honjo, Hideo Ohno, Michio Murahata, Noboru Sakimura, Ayuka Morioka, Yukihide Tsuji, K. Tokutome, Naoki Kasai, Ryusuke Nebashi, Kunihiko Ishihara
Publikováno v:
IEEE Transactions on Magnetics. 50:1-4
We have developed a three-terminal domain wall motion (DWM) device. We found that its performance was significantly degraded by ion irradiation to the DWM materials under conventional etching conditions with Ar/NH3/CO gas mixture plasma for the devic
Publikováno v:
Journal of Japan Society of Civil Engineers, Ser. E2 (Materials and Concrete Structures). 69:207-226
Autor:
Tetsuo Endoh, Masanori Natsui, Hideo Ohno, Shoji Ikeda, Tadahiko Sugibayashi, Takahiro Hanyu, Hiroki Koike, Daisuke Suzuki, Naoki Kasai
Publikováno v:
Introduction to Magnetic Random-Access Memory
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a274f3bb279e42697c165c792e29fe2b
https://doi.org/10.1002/9781119079415.ch7
https://doi.org/10.1002/9781119079415.ch7
Autor:
N. Ishiwata, Naoki Kasai, Shoji Ikeda, Shunsuke Fukami, Michihiko Yamanouchi, Hiroki Sato, Hideo Ohno
Publikováno v:
IEEE Transactions on Magnetics. 48:2152-2157
We studied a scaling property of a three-terminal domain wall (DW)-motion device, which is one of the promising candidates for future low-power nonvolatile memory and logic-in-memory architecture. Using several assumptions, we derived the scaling fac
Publikováno v:
IEEE Transactions on Electron Devices. 57:1987-1995
A nonvolatile crossbar switch using a dual-layered TiOx/TaSiOy solid electrolyte, "NanoBridge," has been developed. NanoBridge is scalable to 50 nm and programmed at low voltage while keeping a low ON-resistance. The high compatibility with a back-en
Publikováno v:
CICC
This paper presents a new nonvolatile magnetic flip-flop (MFF) for standby-power-critical applications. An MFF primitive cell for design libraries has been developed using 150 nm, 1.5 V CMOS and 240 nm MRAM processes. It has advantages over other non
Publikováno v:
IEICE Transactions on Electronics. :417-422
We propose an MRAM macro architecture for SoCs to reduce their area size. The shared write-selection transistor (SWST) architecture is based on 2T1MTJ MRAM cell technology, which enables the same fast access time with a smaller cell area than that of
Publikováno v:
IEEE Transactions on Semiconductor Manufacturing. 21:542-548
A precise evaluation technique was created for developing magnetoresistive random access memory (MRAM), especially memory that operates in a toggle-writing mode. This technique enables us to observe the detailed resistance transition of magnetic tunn
Autor:
Tatsuhiko Nohisa, H. Utsumi, Hiroaki Honjo, Tadashi Shimazu, Tadahiko Sugibayashi, Naoki Kasai, Yuichi Kawano, Ryusuke Nebashi, Hiromitsu Hada, Norikazu Ohshima, Shinsaku Saito, Inoue Masahiko, Katsumi Suemitsu
Publikováno v:
Japanese Journal of Applied Physics. 47:2714-2718
Embedded magnetoresistive random access memory (MRAM) with multi-level interconnects necessitates that magnetic tunnel junction (MTJ) devices have a thermal stability of 350 °C or higher during fabrication. We have improved thermal stability of MRAM
Autor:
Nobuyuki Ishiwata, Naoki Kasai, Shunsuke Fukami, S. Saito, Hiromitsu Hada, Hiroaki Honjo, Ryusuke Nebashi, Noboru Sakimura, Shuichi Tahara, Kenichi Shimura, S. Miura, Norikazu Ohshima, Kiyotaka Tsuji, Kaoru Mori, Y. Kato, Yoshiyuki Fukumoto, Hideaki Numata, Kiyokazu Nagahara, Katsumi Suemitsu, Tomonori Mukai, Tadahiko Sugibayashi, Tetsuhiro Suzuki, Takeshi Honda
Publikováno v:
IEEE Journal of Solid-State Circuits. 42:2378-2385
This paper describes a recently developed 16-Mb toggle magnetic random access memory (MRAM). It has 100-MHz burst modes that are compatible with a pseudo-SRAM even though the toggle cell requires reading and comparing sequences in write modes. To acc