Zobrazeno 1 - 10
of 49
pro vyhledávání: '"Nanju Na"'
Autor:
Hing Yan Thomas To, Nanju Na
Publikováno v:
2019 IEEE 69th Electronic Components and Technology Conference (ECTC).
As data transport speed DDR5 supports jumps up to 6.4Gbps, JEDEC requires DFE at DRAM receive as a new equalization feature in evolving specifications. This paper investigates equalization behaviors of DFE and CTLE and their effectiveness at DDR5 ope
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9e734edec541a0ad5814347ef16a304e
https://doi.org/10.1109/ectc.2019.00187
https://doi.org/10.1109/ectc.2019.00187
Publikováno v:
2018 IEEE 68th Electronic Components and Technology Conference (ECTC).
Several designs of High-Bandwidth Memory (HBM) interface have been reported so far, all on silicon interposer. With the promise of organic interposer to become a lower-cost alternative, complete understanding of electrical performance of such interfa
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::069e340b8f1969b1f49f01fd6bbeb16e
https://doi.org/10.1109/ectc.2018.00198
https://doi.org/10.1109/ectc.2018.00198
Publikováno v:
2017 IEEE 67th Electronic Components and Technology Conference (ECTC).
This paper discusses multi-point address channel design in fly-by topology for high speed memory interface. Waveform behaviors at DRAM locations along the channel are examined in depth with eye opening data in various channel design factors and devic
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2c693f509e805f938f2506b9190d9233
https://doi.org/10.1109/ectc.2017.247
https://doi.org/10.1109/ectc.2017.247
Publikováno v:
2016 IEEE 66th Electronic Components and Technology Conference (ECTC).
Voltage supply noise can impact circuit system performance and functionality. FPGA (Field Programmable Gate Arrays) applications vary from different usage model, the detection of supply noise is crucial for these applications. Detection sensitivity i
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4d47c0c789ba11dbbe28de9ddb5a8da7
https://doi.org/10.1109/ectc.2016.399
https://doi.org/10.1109/ectc.2016.399
Publikováno v:
2015 IEEE 65th Electronic Components and Technology Conference (ECTC).
In high density, high speed Serdes interconnect designs, inappropriate pin placement can lead to differential crosstalk violation. How to relatively compare the crosstalk level due to various pin placements, and estimate its effect on the whole syste
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1da6ecd78edc7e83bc5219f291814625
https://doi.org/10.1109/ectc.2015.7159894
https://doi.org/10.1109/ectc.2015.7159894
Publikováno v:
IEEE Transactions on Advanced Packaging. 25:4-11
This paper presents simulation and analysis of core switching noise for a CMOS ASIC test vehicle. The test vehicle consists of a ceramic ball grid array (CBGA) package on a printed circuit board (PCB). The entire test vehicle has been modeled by acco
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a9645543ee8dbf8c7bcc1ab569a29d3e
https://doi.org/10.1109/tadvp.2002.1017678
https://doi.org/10.1109/tadvp.2002.1017678
Publikováno v:
2014 IEEE 64th Electronic Components and Technology Conference (ECTC).
This paper discusses link routing budget considerations for PCIe Gen3 designs in server systems. Special attention will be given to channel discontinuities and their effect on eye opening. Link training complications will be discussed with respect to
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::462c271b0f4c1fc4d3a6b21154bb1015
https://doi.org/10.1109/ectc.2014.6897600
https://doi.org/10.1109/ectc.2014.6897600
Publikováno v:
IEEE Transactions on Advanced Packaging. 23:340-352
This paper presents a modeling and simulation approach for ground/power planes in high speed packages. A plane pair structure is first characterized in terms of its impedance (Z) matrix at arbitrary port locations in the frequency domain. This soluti
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e6270107792cb866c936cbffa14ebf53
https://doi.org/10.1109/6040.861546
https://doi.org/10.1109/6040.861546
Publikováno v:
IEEE Transactions on Components, Packaging, and Manufacturing Technology: Part B. 21:258-268
This paper discusses the frequency and time domain response of embedded passive components in a multilayered structure fabricated using low temperature co-fired ceramic (LTCC) technology. A rational polynomial approximation that combines the accuracy
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a301b04acccfe1d197184fded55a7b7c
https://doi.org/10.1109/96.704936
https://doi.org/10.1109/96.704936
Publikováno v:
2013 IEEE 63rd Electronic Components and Technology Conference.
This paper discusses the impact of DC wander also called baseline wander resulting from AC-coupling on signal integrity in receive waveforms in AC-coupled serial bus links with focus on PCIe Gen3 signaling. Receive signal behavior from charging and d
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f950ef5ed7c3d9a9e910c560e625db22
https://doi.org/10.1109/ectc.2013.6575863
https://doi.org/10.1109/ectc.2013.6575863