Zobrazeno 1 - 10
of 16
pro vyhledávání: '"Nacima Allouti"'
Autor:
Sylvain Misat, Mikhail Loktev, Ralph Schiedon, Jeroen De Boeij, Michiel van der Stam, Chia-Ching Huang, Pierre Sixt, Haidar Al Dujaili, Tristan Dewolf, Nacima Allouti, Laurent Pain, Cyril Vannuffel, Perceval Coudrain, Arnaud Garnier
Publikováno v:
2022 IEEE 24th Electronics Packaging Technology Conference (EPTC).
Autor:
Yosuke Oi, Laurent Pain, Mori Daisuke, Jerome Dechamp, Asahara Masahiro, Kan Katsushi, Maxime Argoud, Nacima Allouti, Raluca Tiron, Raphael Eleouet
Publikováno v:
2021 IEEE 71st Electronic Components and Technology Conference (ECTC).
We report recent advances in the processing of dry film Epoxy Molding Compounds (EMCs) through two technologies: lamination under vacuum and compression molding. From the perspective of 3D packaging, particularly for Fan-Out Wafer-Level Packaging (FO
Autor:
Didier Campos, P. Coudrain, Yorrick Exbrayat, Lucile Arnaud, Stephane Minoret, F. Ponthenier, Andrea Vinci, Severine Cheramy, Alain Gueugnot, Daniel Scevola, Cesar Fuguet Tortolero, P. Chausse, Roselyne Segaud, Giovanni Romano, Christophe Aumont, Didier Lattard, Jean Charbonnier, Pierre-Emile Philip, C. Ribiere, Arnaud Garnier, Jean Michailos, Mathilde Gottardi, Raphael Eleouet, Frédéric Berger, Eric Guthmuller, Gilles Simon, Jerome Beltritti, Gilles Romero, Maxime Argoud, Denis Dutoit, Alexis Farcy, Nacima Allouti, Therry Mourier, Remi Velard, Pascal Vivet, Corinne Legalland
Publikováno v:
2019 IEEE 69th Electronic Components and Technology Conference (ECTC).
We report the first successful technology integration of chiplets on an active silicon interposer, fully processed, packaged and tested. Benefits of chiplet-based architectures are discussed. Built up technology is presented and focused on 3D interco
Autor:
Marion Paris, Nacima Allouti, Sébastien Bérard-Bergery, Patrick Quéméré, Vincent Farys, Pierre Chevalier, Jérôme Vaillant, Charlotte Beylier
Publikováno v:
Novel Patterning Technologies for Semiconductors, MEMS/NEMS, and MOEMS 2019.
CMOS imaging has experienced significant developement in the last decades. At the center of this progress lies the pixel, composed of a light sensitive area (photodiode) coupled to a network of transistors. As the pixels sizes shrink, the light sensi
Autor:
Pierre Chevalier, Florian Tomaso, Sébastien Bérard-Bergery, Patrick Quéméré, Nacima Allouti, Bénédicte Mortini, Valérie Rousset, Rémi Coquand
Publikováno v:
Novel Patterning Technologies for Semiconductors, MEMS/NEMS, and MOEMS 2019.
The advance in microlithography has greatly helped the development of micro optical elements. Large array of microlenses can now be fabricated in the same fashion as manufacturing of integrated circuit at low cost and high yield [1-2]. Because microl
Autor:
Sébastien Bérard-Bergery, Jean-Baptiste Henry, Alain Ostrovsky, Maryline Cordeau, Charlotte Beylier, Patrick Quéméré, Nacima Allouti, Raphael Eleouet, Florian Tomaso, Valérie Rousset, Jérôme Hazart
Publikováno v:
Design-Process-Technology Co-optimization for Manufacturability XIII.
There has been a significant increase of optical applications in the last decade, either embedded into complex multifunction devices such as smartphones, or for imaging purpose as cameras. Core of such optical systems are microlens arrays, used for l
Autor:
Jean-Philippe Michel, Nacima Allouti, Nicolas Buffet, Jean Charbonnier, C. Ribiere, Moreau Stephane, P. Chausse, David Bouchu
Publikováno v:
2018 IEEE 68th Electronic Components and Technology Conference (ECTC).
Even if polymers are used for decades in electronics and microelectronics, one of the primary drawbacks is their susceptibility to moisture uptake. Moisture penetrating into polymers reduces their mechanical and electrical performances and consequent
Autor:
Myriam Assous, Stephane Moreau, Jean Charbonnier, Jörg Siegert, Maxime Argoud, N. David, C. Hartler, Nacima Allouti, Ewald Wachmann, A. Plihon, C. Brunet-Manquat
Publikováno v:
2017 IEEE 19th Electronics Packaging Technology Conference (EPTC).
As electronic power systems follow the general trend of miniaturization and functional density [1], this study targets reliable and low cost 3D heterogeneous integration technology using Through Silicon Vias (TSV) and Wafer Level Packaging (WLP) for
Autor:
Y. Sinquin, R. Franiatte, M. Daval, K. Kondo, P. Chausse, S. Cheramy, H. Kato, A. Jouve, Arnaud Garnier, Jerome Dechamp, L. Baud, Maxime Argoud, Nacima Allouti
Publikováno v:
3DIC
This paper is dedicated to the full integration of innovative silicon-based material for Wafer-Level molding of silicon interposer wafers. This technology can be used in the frame of silicon packages where the silicon interposer is either reported on
Autor:
Thomas Ferrotti, Charles Baudot, Fabien Gays, C. Vizioz, Denis Mariolle, Sébastien Barnola, Aurélie Souhaité, Sébastien Bérard-Bergery, Sylvie Menezo, Bertrand Szelag, S. Brision, Christophe Kopp, Nacima Allouti, C. Comboroure
Publikováno v:
SPIE Proceedings.
In this paper we report on advances in DUV dry photolithography both for etching and implantation of silicon photonic devices. We explain why silicon patterning is a critical building block in silicon photonics and what are the challenges related to