Multi-Level Mapping of Nanocomputer Architectures Based on Hardware Reuse

Autor: Sébastien Le Beux, Kotb Jabeur, N. Yakymets, Ian O'Connor

Publikováno v: IEEE Journal on Emerging and Selected Topics in Circuits and Systems
IEEE Journal on Emerging and Selected Topics in Circuits and Systems, IEEE, 2015, 5, Issue: 1, pp.88-97. ⟨10.1109/JETCAS.2014.2374272⟩

In this paper, we study the problem of mapping large applications onto hierarchical architectures based on novel nanodevices. We combine both intellectual property (IP) reuse and multi-level mapping concepts in order to cope with application complexi

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::48ecc514b07e9feccfadc9444a918947
https://doi.org/10.1109/jetcas.2014.2374272

Functions classification approach to generate reconfigurable fine-grain logic based on Ambipolar Independent Double Gate FET (Am-IDGFET)

Autor: Ian O'Connor, N. Yakymets, Kotb Jabeur

Publikováno v: Microelectronics Journal
Microelectronics Journal, 2013, 44 (12), pp.1316-1327. ⟨10.1016/j.mejo.2013.09.001⟩
Microelectronics Journal, Elsevier, 2013, 44 (12), pp.1316-1327. ⟨10.1016/j.mejo.2013.09.001⟩

Am-IDGFET is a new family of particular devices in view of the fact that it associates three benefits: (i) it is usually a 1-D electronic device (CNT or SiNW), meaning high mobility, achievable current density and high ION/IOFF ratio; (ii) Independen

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::463839fce20495c8ea311e84cbccbdae
https://hal.science/hal-02060710

High performance 4:1 multiplexer with ambipolar double-gate FETs

Autor: S. Le Beux, N. Yakymets, Ian O'Connor, Kotb Jabeur

Publikováno v: ICECS

In this paper, we exploit the ambipolarity property of double gate devices such as DG-CNTFETs to design a new 4:1 multiplexer, with a significant reduction in circuit complexity with respect to conventional CMOS-based multiplexers for equivalent func

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::52e1d27b2a5ccf5fcede3b8c26750de9
https://doi.org/10.1109/icecs.2011.6122365

Ambipolar double-gate FET binary-decision- diagram (Am-BDD) for reconfigurable logic cells

Autor: N. Yakymets, Ian O'Connor, Kotb Jabeur, S. Le Beux

Publikováno v: NANOARCH

A novel Ambipolar Binary Decision Diagram (Am-BDD) is proposed in this paper, to adapt this logic synthesis and verification technique to logic built with ambipolar devices. We demonstrate how this method enables us to build DG-CNTFET-based n-input r

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::0743af278a5db3621589d4eaef78059e
https://doi.org/10.1109/nanoarch.2011.5941499

Logic cells and interconnect strategies for nanoscale reconfigurable computing fabrics

Autor: N. Yakymets, Ian O'Connor, M. H. Ben Jamaa, Fabien Clermidy, Pierre-Emmanuel Gaillardon, Kotb Jabeur, David Navarro

Publikováno v: ICECS

The back-gate terminal on double-gate ambipolar transistors can be used as a powerful vector to achieve fine-grain logic reconfigurability. This paper describes ways of exploiting this property to improve on standard cell logic techniques, and to bui

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::052947a4918243db7c00b46d5f528d6c
https://doi.org/10.1109/icecs.2010.5724455