Adaptive Source Bias for Improved Resistive-Open Defect Coverage during SRAM Testing

Autor: Luigi Dilillo, A. Todri, Patrick Girard, Alberto Bosio, Elena I. Vatajelu, N. Badereddine, Arnaud Virazel

Publikováno v: ATS: Asian Test Symposium
ATS: Asian Test Symposium, Nov 2013, Jiaosi Township, Taiwan. pp.109-114, ⟨10.1109/ATS.2013.30⟩
Asian Test Symposium

International audience; SRAM testing is becoming more and more challenging due to issues caused by continuous device scaling. Fabricated SRAMs are submitted to random and systematic process variability, which strongly affect the cell's behavior and a

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::37c866a694086551866ce8bdc209057b
https://hal-lirmm.ccsd.cnrs.fr/lirmm-01248609

Analyzing resistive-open defects in SRAM core-cell under the effect of process variability

Autor: Patrick Girard, Elena I. Vatajelu, Alberto Bosio, N. Badereddine, Arnaud Virazel, A. Todri, Luigi Dilillo

Publikováno v: 18th IEEE European Test Symposium
ETS: European Test Symposium
ETS: European Test Symposium, May 2013, Avignon, France. ⟨10.1109/ETS.2013.6569373⟩
ETS

International audience; Functional operations of a Static Random Access Memory (SRAM) are strongly affected by random variability in core-cell transistors and by the variability-induced threshold voltage mismatch between the transistors of the Input-

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::488a62db00d00ed6e7b6dabff9d3ad80
https://hal-lirmm.ccsd.cnrs.fr/lirmm-01921630

Analyzing the effect of concurrent variability in the core cells and sense amplifiers on SRAM read access failures

Autor: A. Todri, Arnaud Virazel, Luigi Dilillo, Patrick Girard, Elena I. Vatajelu, N. Badereddine, Alberto Bosio

Publikováno v: 8th International Conference on Design Technology of Integrated Systems in Nanoscale Era
DTIS: Design and Technology of Integrated Systems in Nanoscale Era
DTIS: Design and Technology of Integrated Systems in Nanoscale Era, Mar 2013, Abu Dhabi, United Arab Emirates. pp.39-44, ⟨10.1109/DTIS.2013.6527775⟩
DTIS

International audience; Conventionally, the access failures in SRAMs are treated at core cell level by means of differential bit line voltage analysis. In this work it is shown that under the assumption of random process variability, the conventional

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::077d11bb7031f8d247e2b0ece8828966
https://doi.org/10.1109/DTIS.2013.6527775

Defect analysis in power mode control logic of low-power SRAMs

Autor: Luigi Dilillo, Alberto Bosio, Arnaud Virazel, A. Todri, L. B. Zordan, N. Badereddine, Patrick Girard

Publikováno v: European Test Symposium
17th European Test Symposium
ETS: European Test Symposium
ETS: European Test Symposium, May 2012, Annecy, France. ⟨10.1109/ETS.2012.6233033⟩

International audience; Summary form only given. Low-power SRAMs embed power gating mechanisms for reducing static power consumption. Power gating is applied in SRAMs using power switches for controlling the supply voltage applied to the various memo

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::f46458c3e741b117f553e397828a1ed3
https://doi.org/10.1109/ets.2012.6233033

Optimized March Test Flow for Detecting Memory Faults in SRAM Devices Under Bit Line Coupling

Autor: Luigi Dilillo, N. Badereddine, Arnaud Virazel, Patrick Girard, Alberto Bosio, L. B. Zordan, Serge Pravossoudovitch

Publikováno v: DDECS'11: 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits ans Systems
DDECS'11: 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits ans Systems, Netherlands. pp.353-358
DDECS
GDR SOC-SIP'11 : Colloque GDR SoC-SiP
GDR SOC-SIP'11 : Colloque GDR SoC-SiP, Lyon, France

A comprehensive SRAM test must guarantee the correct functioning of each cell of the memory (ability to store and to maintain data), and the corresponding addressing, write and read operations. SRAM testing is mainly based on the concept of fault mod

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::514ae729d0ef230dc9690a4be8298429
https://hal-lirmm.ccsd.cnrs.fr/lirmm-00592182