Zobrazeno 1 - 10
of 23
pro vyhledávání: '"N B, Ray"'
Autor:
Biswojit Nayak, B. N. B. Ray
Publikováno v:
2023 36th International Conference on VLSI Design and 2023 22nd International Conference on Embedded Systems (VLSID).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ec3ff22e7e059d3f9a9bd76f319b6bf1
https://doi.org/10.1109/vlsid57277.2023.00051
https://doi.org/10.1109/vlsid57277.2023.00051
Publikováno v:
Applications of Machine Learning in Big-Data Analytics and Cloud Computing ISBN: 9781003337218
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::339e70ce2a4d222b9c7c0623d1441f0a
https://doi.org/10.1201/9781003337218-6
https://doi.org/10.1201/9781003337218-6
Autor:
Akshaya Kumar Dash, B N B Ray
Publikováno v:
2021 19th OITS International Conference on Information Technology (OCIT).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::aac5247ff3ec901e350a5b8ccc2cecd9
https://doi.org/10.1109/ocit53463.2021.00017
https://doi.org/10.1109/ocit53463.2021.00017
Autor:
B. N. B. Ray, Rashmita Padhi
Publikováno v:
Digital Democracy – IT for Change ISBN: 9789811627224
In this paper, we study a particular class of symmetric algorithms that aim to ensure confidentiality by using a functionality that is tweakable enciphering scheme. A tweakable enciphering scheme is a length preserving encryption protocol which can e
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::87e23c94d3255bd863b56d1b2d5787f5
https://doi.org/10.1007/978-981-16-2723-1_11
https://doi.org/10.1007/978-981-16-2723-1_11
Publikováno v:
ICIT
In very large scale integration (VLSI) of chip, placement is an important stage where cells or blocks are placed within chip optimally minimizing their interconnect wire-length. Analytical placement approach solves the placement problem in three stag
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b3824b6fdf4145c40f521d0f9deb0baa
https://doi.org/10.1109/icit48102.2019.00084
https://doi.org/10.1109/icit48102.2019.00084
Publikováno v:
International Journal of Research in Engineering and Technology. :201-205
Frequency Allocation Problem in wireless cellular networks is a major area of research in telecommunication industries. Since users of mobile phones are increasing exponentially, the existing limited frequency spectrum is unable to provide services e
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::82cfc4c18e4855629f981527dc143a9f
https://doi.org/10.15623/ijret.2015.0401031
https://doi.org/10.15623/ijret.2015.0401031
Publikováno v:
International Journal of Research in Engineering and Technology. :420-425
One of the graph theoretic approaches of channel assignment for cellular networks is routing a pair of nodes arranged in a single-row axis called single-row routing problem. The network with nodes representing caller and receiver is to be transformed
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2b196b51f50cf9e64368951cfa856cb0
https://doi.org/10.15623/ijret.2014.0307072
https://doi.org/10.15623/ijret.2014.0307072
Publikováno v:
International Journal of Computer Applications. 54:36-41
This work suggests a parallel algorithm for Hermite interpolation on Extended Fibonacci Cube (n) EFC1 . The proposed algorithm has 3 phases: initialization, main and final. The main phase of the algorithm involves 3 2 N multiplications, N additio
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::439eb668d3c53dfc97a95ea9fca2024c
https://doi.org/10.5120/8661-2534
https://doi.org/10.5120/8661-2534
Publikováno v:
The International Journal of Forensic Computer Science. :16-23
The digital information systems have become increasingly complex and inex- tricably intertwined with the infrastructure of national, public, and private organizations. The forensic digital analysis as a whole, in its relative infancy, is the unwillin
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::739299f17d57912b5d073cde7b00fa65
https://doi.org/10.5769/j201201002
https://doi.org/10.5769/j201201002
Autor:
Shankar Balachandran, B. N. B. Ray
Publikováno v:
VLSI Design
Analytical placement engines use half-perimeter wire length (HPWL) of the circuit as an objective function to place blocks optimally within a chip. Inspired by popularly used log sum-exp (LSE) wire length model [6], ABS wire length model [5] and weig
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::310399c182e006691d74bdf6aa038694
https://doi.org/10.1109/vlsid.2015.76
https://doi.org/10.1109/vlsid.2015.76