Zobrazeno 1 - 10
of 22
pro vyhledávání: '"Myongseob Kim"'
Publikováno v:
2020 IEEE 70th Electronic Components and Technology Conference (ECTC).
The industry trend is to continue to scale up 2.5D interposers to increase logic and memory densities while enabling heterogeneous integration. However, larger interposer size makes package capacitors on the package substrate less effective to reduce
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8fe17902e9e8ab4eb52b3c74fbb71063
https://doi.org/10.1109/ectc32862.2020.00069
https://doi.org/10.1109/ectc32862.2020.00069
Autor:
Gamal Refai-Ahmed, Myongseob Kim, Henley Liu, Hong Shi, Suresh Ramalingam, Ho Hyung Lee, Boon Y. Ang, Jaspreet S. Gandhi, Tom Lee
Publikováno v:
International Symposium on Microelectronics. 2017:000336-000341
FPGA partitioning and high density integration using interposer based 2.5D stacked silicon interconnect technology (SSIT) has been the pioneering work at Xilinx for several years enabling advanced applications in high performance computing, networkin
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5f2f7be149d11965a8bce95ffc89dda9
https://doi.org/10.4071/isom-2017-wp13_109
https://doi.org/10.4071/isom-2017-wp13_109
Autor:
Woon-Seong Kwon1 woon-seong.kwon@xilinx.com, Myongseob Kim1, Jonathan Chang1, Ramalingam, Suresh1, Madden, Liam1, Genie Tsai2, Stephen Tseng2, Lai, J. Y.2, Terren Lu2, Steve Chiu2
Publikováno v:
Journal of Microelectronic & Electronic Packaging. 2015, Vol. 12 Issue 2, p67-71. 5p.
Autor:
Henley Liu, Suresh Ramalingam, Xin Wu, Tom Lee, Susan Wu, Woon-Seong Kwon, Boon Y. Ang, Myongseob Kim, Liam Madden, Ephrem C. Wu, Jonathan Chang
Publikováno v:
3D Integration in VLSI Circuits ISBN: 9781315200699
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4c514c7f558307e67b5d0e66c9806f85
https://doi.org/10.1201/9781315200699-3
https://doi.org/10.1201/9781315200699-3
Autor:
Terren Lu, Stephen Tseng, Myongseob Kim, J. Y. Lai, Liam Madden, Woon-Seong Kwon, Suresh Ramalingam, Jonathan Chang, Genie Tsai, Steve Chiu
Publikováno v:
Journal of Microelectronics and Electronic Packaging. 12:67-71
Technology challenges and solutions in the development and manufacturing of stacked silicon interconnect (SSI) technology have been investigated with the established foundry and outsourced semiconductor assembly and test ecosystem. Key enabling techn
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2b59146d9830329d5e8cd22ac10d984a
https://doi.org/10.4071/imaps.453
https://doi.org/10.4071/imaps.453
Publikováno v:
2017 IEEE 24th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA).
3D-IC has been recognized as one of the technology solutions from More than Moore. Xilinx's 3D-IC FPGA has been well adopted by the industry since the first Virtex®-7 2000T introduced in 2011. In particular recently, data center requires large volum
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a82edb742ba9e4c2d6cd502ccde0e68a
https://doi.org/10.1109/ipfa.2017.8060060
https://doi.org/10.1109/ipfa.2017.8060060
Autor:
Liam Madden, J. Y. Lai, Genie Tsai, Myongseob Kim, Terren Lu, Stephen Tseng, Steve Chiu, Jonathan Chang, Suresh Ramalingam, Woon-Seong Kwon
Publikováno v:
International Symposium on Microelectronics. 2013:000217-000222
Technology challenges and solutions in the development and manufacturing of Stacked Silicon Interconnect (SSI) Technology have been investigated with the established foundry and OSAT ecosystem. Key enabling technologies, such as TSV processing, inter
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::eee0a3fe49b7e3a5aaf12c80272b1663
https://doi.org/10.4071/isom-2013-tp11
https://doi.org/10.4071/isom-2013-tp11
Publikováno v:
International Symposium on Microelectronics. 2011:000189-000192
Silicon interposer minimizes CTE mismatch between the chip and copper filled TSV interposer resulting in high reliability micro bumps. Furthermore, providing high wiring density interconnections and improved electrical performance are the reasons TSV
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d6cea1b7d032446204767d890bc4b969
https://doi.org/10.4071/isom-2011-tp1-paper1
https://doi.org/10.4071/isom-2011-tp1-paper1
Autor:
Ivor G Barber, Laurene Yip, Henley Liu, Suresh Ramalingam, Tom Lee, Myongseob Kim, Jonathan Chang, Bahareh Banijamali
Publikováno v:
2015 IEEE 65th Electronic Components and Technology Conference (ECTC).
TSV interposer has emerged as a good solution to provide high wiring density interconnections and improved electrical performance due to shorter interconnection from the die to substrate. Furthermore, silicon interposer minimizes CTE mismatch between
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::40fee7f20acf5dcccf960bac3cdb90af
https://doi.org/10.1109/ectc.2015.7159604
https://doi.org/10.1109/ectc.2015.7159604
Publikováno v:
IEEE Transactions on Dielectrics and Electrical Insulation. 12:1082-1087
A new characterization method for charge conditions in electret polymer films is proposed. This method uses the change of the threshold voltage in an EEPROM (electrically erasable and programmable read-only memory) device to evaluate the effective ch
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::be375ab3edee11b32c5635150cb0c4d1
https://doi.org/10.1109/tdei.2005.1522200
https://doi.org/10.1109/tdei.2005.1522200