Zobrazeno 1 - 10 of 54 pro vyhledávání: '"Musa, Ahmed Magdi Hassan"'
4
A Compact and Low-Power Fractionally Injection-Locked Quadrature Frequency Synthesizer Using a Self-Synchronized Gating Injection Technique for Software-Defined Radios
Autor: Deng, Wei, AHMED, MAGDI MUSA, Musa, Ahmed Magdi Hassan, Okada, Kenichi, Matsuzawa, Akira
Publikováno v: IEEE Journal of Solid-State Circuits. 49:1984-1994
This paper describes a compact and low-power frequency synthesizer with quadrature phase output for software-defined radios (SDRs). The proposed synthesizer is constructed using a core phase-locked loop (PLL), which is coupled with a fractional-N inj
Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::e17398ddba38cf819e002beaa364a50b
https://doi.org/10.1109/jssc.2014.2334392
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5
A Compact, Low Power and Low Jitter Dual-Loop Injection Locked PLL Using All-Digital PVT Calibration
Autor: AHMED, MAGDI MUSA, Musa, Ahmed Magdi Hassan, Deng, Wei, SIRIBURANON, T, Siriburanon, Teerachot, Miyahara, Masaya, Okada, Kenichi, Matsuzawa, Akira
Publikováno v: IEEE Journal of Solid-State Circuits. 49(No. 1):50-60
This paper presents a low-jitter, low-power and a small-area injection-locked all-digital PLL (IL-ADPLL). It consists of a dual-loop and a dual-VCO architecture in which one VCO (Replica) is placed in a TDC-less synthesizable ADFLL to provide continu
Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::5f77563b8c0e052c5b76b16ed0e02a33
http://t2r2.star.titech.ac.jp/cgi-bin/publicationinfo.cgi?q_publication_content_number=CTT100663596
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6
A 20GHz Push-Push Voltage-Controlled Oscillator Using Second-Harmonic Peaking Technique for a 60GHz Frequency Synthesizer
Autor: SIRIBURANON, T, Siriburanon, Teerachot, Sato, Takahiro, AHMED, MAGDI MUSA, Musa, Ahmed Magdi Hassan, Deng, Wei, Okada, Kenichi, Matsuzawa, Akira
Publikováno v: IEICE Transactions on Electronics. (No. 6):804-812
This paper presents a 20 GHz push-push VCO realized by a 10 GHz super-harmonic coupled quadrature oscillator for a quadrature 60 GHz frequency synthesizer. The output nodes are peaked by a tunable second harmonic resonator. The proposed VCO is implem
Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::e034ba3c9d1db31cdc317a61e2d526eb
http://t2r2.star.titech.ac.jp/cgi-bin/publicationinfo.cgi?q_publication_content_number=CTT100663598
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7
Progressive Mixing Technique to Widen the Locking Range of High Division-Ratio Injection-Locked Frequency Dividers
Autor: AHMED, MAGDI MUSA, Musa, Ahmed Magdi Hassan, Okada, Kenichi, Matsuzawa, Akira
Publikováno v: IEEE Transactions on Microwave Theory and Techniques. 61:1161-1173
This paper proposes progressive mixing as a technique to widen the locking range of injection locked frequency dividers (ILFDs) with higher division ratios. The ILFD locking range for a certain division ratio depends on the harmonics that are used to
Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::d1f3c1aa7d6de2a917bac714b528d01b
https://doi.org/10.1109/tmtt.2013.2244224
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9
A 60-GHz 16QAM/8PSK/QPSK/BPSK Direct-Conversion Transceiver for IEEE802.15.3c
Autor: Okada, Kenichi, li, ning, Matsushita, Kota, Bunsen, Keigo, Murakami, Rui, AHMED, MAGDI MUSA, Musa, Ahmed Magdi Hassan, Sato, Takahiro, Asada, Hiroki, Takayama, Naoki, Ito, Shogo, CHAIVIPAS, WIN, Minami, Ryo, Yamaguchi, Tatsuya, Takeuchi, Yasuaki, Yamagishi, Hiroyuki, Noda, Makoto, Matsuzawa, Akira
Publikováno v: ISSCC
This paper presents a 60-GHz direct-conversion transceiver using 60-GHz quadrature oscillators. The transceiver has been fabricated in a standard 65-nm CMOS process. It in cludes a receiver with a 17.3-dB conversion gain and less than 8.0-dB noise fi
Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::c3345996dbb1840865cbc98381935b58
https://doi.org/10.1109/jssc.2011.2166184
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10
A Low Phase Noise Quadrature Injection Locked Frequency Synthesizer for MM-Wave Applications
Autor: AHMED, MAGDI MUSA, Musa, Ahmed Magdi Hassan, Murakami, Rui, Sato, Takahiro, CHAIVIPAS, WIN, Okada, Kenichi, Matsuzawa, Akira
Publikováno v: IEEE Journal of Solid-State Circuits. 46:2635-2649
This paper proposes a 60 GHz quadrature PLL frequency synthesizer for the IEEE802.15.3c with wide tuning range and low phase noise. The synthesizer is constructed using a 20 GHz PLL that is coupled with a Quadrature Injection Locked Oscillator (QILO)
Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::3ffa8024e1f38af85d2174d111d4983b
https://doi.org/10.1109/jssc.2011.2166336
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