Zobrazeno 1 - 8
of 8
pro vyhledávání: '"Muralikrishna Sathyamurthy"'
Autor:
Ralf Sommer, Jun Tan, Jonathan Gamez, Alexander Rolapp, Sylvo Jager, Moataz Elkharashi, Benjamin Saft, Muralikrishna Sathyamurthy
Publikováno v:
IEEE Journal of Radio Frequency Identification. 4:3-13
This paper presents a fully passive 13.56MHz Radio Frequency Identification (RFID) to I2C platform integrated circuit (IC), which has been optimized to reduce supply interference, for RFID sensor applications. In order to reduce the supply interferen
Autor:
Hani Abdullah, Eric Schafer, Benjamin Saft, Muralikrishna Sathyamurthy, Martin Grabmann, Bjoern Bieske, Jonathan Gamez, Sylvo Jager, Jacek Nowak, Jun Tan
Publikováno v:
2021 IEEE International Conference on RFID Technology and Applications (RFID-TA).
Autor:
Muralikrishna Sathyamurthy, Eric Schafer, Jonathan Gamez, Eckhard Hennig, Jun Tan, Ralf Sommer, Alexander Rolapp
Publikováno v:
IEEE Journal of Radio Frequency Identification. 3:35-45
This paper presents a fully passive 13.56 -MHz RFID temperature sensor system-on-chip. Its power management unit operates over a large temperature range using a zero temperature coefficient bias source. On-chip temperature sensing is accomplished wit
Autor:
Ralf Sommer, Benjamin Saft, Sylvo Jager, Moataz Elkharashi, Jonathan Gamez, Alexander Rolapp, Muralikrishna Sathyamurthy, Jun Tan
Publikováno v:
RFID
This paper presents a fully passive 13.56MHz RFID to I2C bridge IC, which has been optimized to reduce supply interference, for RFID sensor applications. To reduce the supply interference, this paper proposes a modified low-dropout regulator (LDO) to
Autor:
Jonathan Gamez, Jun Tan, Alexander Rolapp, Ralf Sommer, Eckhard Hennig, Muralikrishna Sathyamurthy
Publikováno v:
RFID
This paper presents a fully passive 13.56 MHz RFID temperature sensor system-on-chip. Its power management unit (PMU) operates over a large temperature range using a zero temperature coefficient (TC) bias source. On-chip temperature sensing is accomp
Publikováno v:
Analog Integrated Circuits and Signal Processing. 78:191-207
Universal verification methodology (UVM) is a standardized methodology for verifying integrated circuit designs. In this contribution, we present a UVM-based verification methodology for verifying mixed-signal smart-sensor systems. Our approach permi
Autor:
Safwat Irteza, Andre Jager, Andre Richter, Eric Schafer, Muralikrishna Sathyamurthy, Muhammad Abdullah Khan, Alexander Rolapp, Sebastian Kerkmann, Bjorn Bieske, Eckhard Hennig, Ralf Sommer
Publikováno v:
2014 7th ESA Workshop on Satellite Navigation Technologies and European Workshop on GNSS Signals and Signal Processing (NAVITEC).
We present a four-channel GNSS front-end IC for a compact interference- and jammer-robust multi-antenna sub-sampling receiver for Galileo El-B/C and GPS LI signals. The front end includes four coherent RF-to-IF signal paths with an intermediate frequ
Publikováno v:
2012 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD).
In this contribution, we present a UVM-based methodology for mixed-signal smart-sensor systems. Our approach permits the validation of system functionality before implementation and to verify implementations on various levels of abstraction. The mode