Zobrazeno 1 - 10
of 59
pro vyhledávání: '"Muralidhar Talupur"'
Publikováno v:
International Journal on Software Tools for Technology Transfer. 18:375-391
We present a model checking-based method for verifying list-based concurrent set data structures. Concurrent data structures are notorious for being hard to get right and thus, their verification has received significant attention from the verificati
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::beaaabb5c4a2c5885a080234a98a4174
https://doi.org/10.1007/s10009-015-0369-y
https://doi.org/10.1007/s10009-015-0369-y
Publikováno v:
Handbook of Model Checking ISBN: 9783319105741
Handbook of Model Checking
Handbook of Model Checking
We consider the model-checking problem for a particular class of parameterized systems: systems that consist of arbitrary numbers of components. The task is to show correctness regardless of the number of components. The term parameterized refers to
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::12483cc95ed2b6949426d99682ae9992
https://doi.org/10.1007/978-3-319-10575-8_21
https://doi.org/10.1007/978-3-319-10575-8_21
Publikováno v:
Journal on Satisfiability, Boolean Modeling and Computation. 3:91-114
Existing difference logic (DL) solvers can be broadly classified as eager or lazy, each with its own merits and de-merits. We propose a novel difference logic solver SDSAT that combines the strengths of both these approaches and provides a robust per
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7c7511723c3f6fece02973cbd018fa1b
https://doi.org/10.3233/sat190031
https://doi.org/10.3233/sat190031
Publikováno v:
FMCAD
The lack of appropriate models is often the biggest hurdle in applying formal methods in the industry. Creating executable models of industrial designs is a challenging task, one that we believe has not been sufficiently addressed by existing researc
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e4076f3c252cb0d7db211ed7271ebbca
https://doi.org/10.1109/fmcad.2015.7542267
https://doi.org/10.1109/fmcad.2015.7542267
Publikováno v:
Automated Technology for Verification and Analysis ISBN: 9783319119359
ATVA
ATVA
We consider the problem of verifying deadlock freedom for symmetric cache coherence protocols. While there are multiple definitions of deadlock in the literature, we focus on a specific form of deadlock which is useful for the cache coherence protoco
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b0320b490cd5d2358b919f8920f18bd1
https://doi.org/10.1007/978-3-319-11936-6_24
https://doi.org/10.1007/978-3-319-11936-6_24
Publikováno v:
Model Checking Software ISBN: 9783642391750
SPIN
SPIN
We present a model checking based method for verifying list-based concurrent data structures. Concurrent data structures are notorious for being hard to get right and thus, their verification has received significant attention from the verification c
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0ac170fe857e2cd10b42d0ed9eecc736
https://doi.org/10.1007/978-3-642-39176-7_20
https://doi.org/10.1007/978-3-642-39176-7_20
Publikováno v:
Model Checking Software ISBN: 9783642317583
SPIN
SPIN
Concurrent data structures are provided in libraries such as Intel Thread Building Blocks and Java.util.concurrent to enable efficient implementation of multi-threaded programs. Their efficiency is achieved by using fine grained synchronization which
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ffe5e13242dd22503b82758401a4e3a9
https://doi.org/10.1007/978-3-642-31759-0_15
https://doi.org/10.1007/978-3-642-31759-0_15
Autor:
Muralidhar Talupur, Hyojung Han
Publikováno v:
Tools and Algorithms for the Construction and Analysis of Systems ISBN: 9783642198342
TACAS
TACAS
We describe two new state exploration algorithms, called biased-dfs and biased-bfs, that bias the search towards regions more likely to have error states using high level hints supplied by the user. These hints are in the form of priorities or markin
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1ecbf1cf73a86a7594f60eb2738866ab
https://doi.org/10.1007/978-3-642-19835-9_20
https://doi.org/10.1007/978-3-642-19835-9_20
Autor:
Muralidhar Talupur, Mark R. Tuttle
Publikováno v:
FMCAD
A message flow is a sequence of messages sent among processors during the execution of a protocol, usually illustrated with something like a message sequence chart. Protocol designers use message flows to describe and reason about their protocols. We
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7bb0c02abbf393b28dac1b2a9a989053
https://doi.org/10.1109/fmcad.2008.ecp.14
https://doi.org/10.1109/fmcad.2008.ecp.14
Publikováno v:
Next Generation Design and Verification Methodologies for Distributed Embedded Control Systems ISBN: 9781402062537
In real-time systems, correctness depends on the time at which events occur. Examples of real-time systems include timed protocols and many embedded system controllers. Timed automata are an extension of finite-state automata that include real-valued
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::27c7f4d2624082672ff8af61479f292c
https://doi.org/10.1007/978-1-4020-6254-4_1
https://doi.org/10.1007/978-1-4020-6254-4_1