A 30-MHz–2.4-GHz CMOS Receiver With Integrated RF Filter and Dynamic-Range-Scalable Energy Detector for Cognitive Radio Systems

Autor: Masaki Kitsunezuka, Hiroshi Kodama, Naoki Oshima, Muneo Fukaishi, Tadashi Maeda, Kazuaki Kunihiro

Publikováno v: IEEE Journal of Solid-State Circuits. 47:1084-1093

A 30-MHz-2.4-GHz complementary metal oxide semiconductor (CMOS) receiver with an integrated tunable RF filter and a dynamic-range-scalable energy detector for both white-space and interference-level sensing in cognitive radio systems is reported. The

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::0ca1756468a678aefdbff0222998253a
https://doi.org/10.1109/jssc.2012.2185531

A Low-IF/Zero-IF Reconfigurable Analog Baseband IC With an I/Q Imbalance Cancellation Scheme

Autor: Muneo Fukaishi, Takashi Tokairin, Masaki Kitsunezuka, Tadashi Maeda

Publikováno v: IEEE Journal of Solid-State Circuits. 46:572-582

A low-IF/zero-IF reconfigurable analog baseband IC embodying an automatic I/Q imbalance cancellation scheme is reported. The chip, which comprises a down-conversion mixer, an analog baseband filter, and a programmable gain amplifier, achieves a high

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::3642e66a841521a31fed86bf9582015f
https://doi.org/10.1109/jssc.2010.2102510

A 60 GHz Power Amplifier With 14.5 dBm Saturation Power and 25% Peak PAE in CMOS 65 nm SOI

Autor: Pierre Vincent, N. Deparis, Nathalie Rolland, Christopher Mounet, Baudouin Martineau, Yasuhiro Hamada, Alexandre Siligaris, Christine Raynaud, Muneo Fukaishi

Publikováno v: IEEE Journal of Solid-State Circuits
IEEE Journal of Solid-State Circuits, 2010, 45, pp.1286-1294. ⟨10.1109/JSSC.2010.2049456⟩
IEEE Journal of Solid-State Circuits, Institute of Electrical and Electronics Engineers, 2010, 45, pp.1286-1294. ⟨10.1109/JSSC.2010.2049456⟩

A 60 GHz wideband power amplifier (PA) is fabricated in a standard CMOS SOI 65 nm process. The PA is based on two cascode stages. Input, output and inter-stage matching use coplanar wave guide (CPW) transmission lines that have low losses thanks to t

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::97bb9152fdced5c54b52b86e0a4a5d70
https://doi.org/10.1109/jssc.2010.2049456

A 1 Tb/s 3 W Inductive-Coupling Transceiver for 3D-Stacked Inter-Chip Clock and Data Link

Autor: Yoshihiro Nakagawa, Mari Inoue, Kiichi Niitsu, Daisuke Mizoguchi, Noriyuki Miura, Muneo Fukaishi, Takayasu Sakurai, Tadahiro Kuroda, Masamoto Tago

Publikováno v: IEEE Journal of Solid-State Circuits. 42:111-122

A 1 Tb/s 3 W inter-chip transceiver transmits clock and data by inductive coupling at a clock rate of 1 GHz and data rate of 1 Gb/s per channel. 1024 data transceivers are arranged with a pitch of 30 mum in a layout area of 1 mm2. The total layout ar

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::4c3428c7bd192e352fdbdfb69ec42f1c
https://doi.org/10.1109/jssc.2006.886554

A 0.13-μm CMOS 5-Gb/s 10-m 28AWG cable transceiver with no-feedback-loop continuous-time post-equalizer

Autor: Masayuki Mizuno, Y. Kudoh, Muneo Fukaishi

Publikováno v: IEEE Journal of Solid-State Circuits. 38:741-746

The frequency-dependent attenuation of the transmission lines between chips and printed circuit boards, for example, is an obstacle to improving the performance of a system enhanced with LSI technology scaling. This is because large frequency-depende

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::55bc0e7e465a3cf7d5b4b309ead6db5e
https://doi.org/10.1109/jssc.2003.810029